EP7311_05 Datasheet, PDF (14/58 Pages) Cirrus Logic – High-performance, Low-power, System-on-chip with SDRAM & Enhanced Digital Audio Interface

EP7311
High-Performance, Low-Power System on Chip
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
CI/O
Transceiver capacitance
8
-
10.0
pF
Only nPOR, nPWRFAIL,
IDD_STANDBY
Standby current consumption¹
Core, Osc, RTC @2.5 V
-
77
-
nURESET, PE0, PE1, and RTS
µA
are driven, while all other float,
@ 25 C
I/O @ 3.3 V
-
41
-
VIH = V_DD ± 0.1 V,
VIL = GND ± 0.1 V
IDD_STANDBY
Standby current consumption¹
Core, Osc, RTC @2.5 V
-
@ 70 C
I/O @ 3.3 V
-
Only nPOR, nPWRFAIL,
nURESET, PE0, PE1, and RTS
-
570
µA
are driven, while all other float,
-
111
VIH = V_DD ± 0.1 V,
VIL = GND ± 0.1 V
IDD_STANDBY
@ 85 C
Standby current consumption¹
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
-
-
Only nPOR, nPWRFAIL,
nURESET, PE0, PE1, and RTS
-
1693
µA
are driven, while all other float,
-
163
VIH = V_DD ± 0.1 V,
VIL = GND ± 0.1 V
IDD_idle
at 74 MHz
Idle current consumption¹
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
Both oscillators running, CPU
static, Cache enabled, LCD
-
-
6
10
-
-
mA
disabled, VIH = V_DD ± 0.1 V, VIL
= GND ± 0.1 V
VDD_STANDBY Standby supply voltage
2.0
-
Minimum standby voltage for
-
V
state retention, internal SRAM
cache, and RTC operation only
a.
Refer to the strength column in the pin assignment tables for all package types.
b.
Assumes buffer has no pull-up or pull-down resistors.
c.
The leakage value given assumes that the pin is configured as an input pin but is not currently being driven.
Note:
1) Total power consumption = IDD_CORE x 2.5 V + IDD_IO x 3.3 V
2) A typical design will provide 3.3 V to the I/O supply (i.e., V_DDIO), and 2.5 V to the remaining logic. This is to allow the I/O to be
compatible with 3.3 V powered external logic (i.e., 3.3 V SDRAMs).
2) Pull-up current = 50 µA typical at V_DD = 3.3 V.
14
©Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
DS506F1