EP7311_05 Datasheet, PDF (37/58 Pages) Cirrus Logic – High-performance, Low-power, System-on-chip with SDRAM & Enhanced Digital Audio Interface

EP7311
High-Performance, Low-Power System on Chip
204-Ball TFBGA Ball Listing
The list is ordered by ball location.
Table 21. 204-Ball TFBGA Ball Listing
Ball Location
Name
†
Strength
Reset
State
Type
A1
VDDIO
Pad power
A2
EXPCLK
A3
nCS[3]
A4
nCS[1]
1
I
1
High
O
1
High
O
A5
nMWE/nSDWE
1
High
O
A6
SDQM[2]
2
A7
nSDCS[1]
1
A8
DD[2]
1
A9
FRM
1
A10
CL[1]
1
A11
VSSCORE
A12
D[1]
1
A13
A[2]
2
A14
D[4]
1
A15
A[5]
1
A16
nPWRFL
A17
MOSCOUT
A18
VSSIO
A19
VSSIO
A20
VSSIO
B1
WORD
1
B2
VDDIO
B3
nCS[5]
1
B4
nCS[2]
1
B5
nMOE/nSDCAS
1
B6
SDCKE
2
B7
nSDCS[0]
1
Low
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
High
Low
High
O
O
O
O
O
Core ground
I/O
O
I/O
O
I
O
Pad ground
Pad ground
Pad ground
O
Pad power
O
O
O
O
O
Description
Digital I/O power,
3.3 V
Expansion clock
input
Chip select 3
Chip select 1
ROM, expansion
write enable/
SDRAM write enable
control signal
SDRAM byte lane
mask
SDRAM chip select
2
LCD serial display
data
LCD frame
synchronization
pulse
LCD line clock
Core ground
Data I/O
System byte address
Data I/O
System byte address
Power fail sense
input
Main oscillator out
I/O ground
I/O ground
I/O ground
Word access select
output
Digital I/O power, 3.3
V
Chip select 5
Chip select 2
ROM, expansion OP
enable/SDRAM CAS
control signal
SDRAM clock
enable output
SDRAM chip select
0
DS506F1
©Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
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