WM8918 Datasheet, PDF (38/176 Pages) Cirrus Logic – Ultra Low Power DAC for Portable Audio Applications

WM8918
Production Data
A clock is required for the digital filtering function, and the DC Servo must also be running. This
requires:
 MCLK is present or the FLL is selected as the SYSCLK source in free-running mode
 CLK_SYS_ENA = 1
 DCS_ENA_CHAN_n is enabled (where n = 0, 1, 2 or 3)
Any MICBIAS Current Detect event (accessory insertion/removal or hookswitch press/release) which
happens while one or more of the clocking criteria is not satisfied (for example during a low power
mode where the CPU has disabled MCLK) will still be detected, but only after the clocking conditions
are met. An example is illustrated in Figure 25, where the mic is inserted while MCLK is stopped.
Figure 25 MICBIAS Detection events without MCLK
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PD, Rev 4.1, January 2012
38