WM8918 Datasheet, PDF (16/176 Pages) Cirrus Logic – Ultra Low Power DAC for Portable Audio Applications

WM8918
Production Data
POWER CONSUMPTION
The WM8918 power consumption is dependent on many parameters. Most significantly, it depends
on supply voltages, sample rates, mode of operation, and output loading.
The power consumption on each supply rail varies approximately with the square of the voltage.
Power consumption is greater at fast sample rates than at slower ones. When the digital audio
interface is operating in Master mode, the DBVDD current is significantly greater than in Slave mode.
(Note also that power savings can be made by using MCLK as the BCLK source in Slave mode.) The
output load conditions (impedance, capacitance and inductance) can also impact significantly on the
device power consumption.
COMMON TEST CONDITIONS
Unless otherwise stated, the following test conditions apply throughout the following sections:
 Ambient temperature = +25°C
 Audio signal = quiescent (zero amplitude)
 Sample rate = 48kHz
 MCLK = 12.288MHz
 Audio interface mode = Slave (LRCLK_DIR=0, BCLK_DIR=0)
 SYSCLK_SRC = 0 (system clock comes direct from MCLK, not from FLL)
Additional, variant test conditions are quoted within the relevant sections below. Where applicable,
power dissipated in the headphone or line loads is included.
POWER CONSUMPTION MEASUREMENTS
Stereo Playback to Headphones - DAC input to HPOUTL+HPOUTR pins with 30Ω load.
Test conditions:
VMID_RES = 01 (for normal operation)
CP_DYN_PWR = 1 (Class-W, Charge pump controlled by real-time audio level)
Variant test conditions
AVDD
DCVDD
DBVDD
48kHz sample rate
8kHz sample rate
48kHz, Po = 0.1mW/channel
1kHz sine wave 0dBFS
HPOUT_VOL= -25dB
DAC_VOL= 0dB
48kHz, Po = 1mW/channel
1kHz sine wave 0dBFS
HPOUT_VOL= -15dB
DAC_VOL= 0dB
48kHz sample rate, Master mode,
FLL enabled, MCLK input frequency =
13MHz
48kHz sample rate, Master mode,
FLL enabled, MCLK input frequency =
32.768kHz
V mA V mA V mA
1.80 1.69 1.00 0.76 1.80 0.00
1.80 1.69 1.00 0.18 1.80 0.00
1.80 1.71 1.00 0.77 1.80 0.00
1.80 1.73 1.00 0.77 1.80 0.00
1.80 1.82 1.00 1.05 1.80 0.73
1.80 1.83 1.00 0.94 1.80 0.76
CPVDD
V mA
1.80 0.31
1.80 0.31
1.80 1.99
1.80 5.61
1.80 0.30
1.80 0.29
MICVDD TOTAL
V mA mW
2.50 0.01 4.38
2.50 0.01 3.80
2.50 0.01 7.45
2.50 0.01 13.99
2.50 0.01 6.18
2.50 0.01 6.14
w
PD, Rev 4.1, January 2012
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