CS42448 Datasheet, PDF (3/70 Pages) Cirrus Logic – 108 dB, 192 kHz 6-in, 8-out CODEC

5 REGISTER QUICK REFERENCE ........................................................................................... 41
6 REGISTER DESCRIPTION ..................................................................................................... 43
6.1 Memory Address Pointer (MAP) ....................................................................................... 43
6.2 Chip I.D. and Revision Register (address 01h) (Read Only) ............................................ 43
6.3 Power Control (address 02h)............................................................................................ 44
6.4 Functional Mode (address 03h)........................................................................................ 45
6.5 Interface Formats (address 04h) ...................................................................................... 46
6.6 ADC Control & DAC De-emphasis (address 05h) ............................................................ 48
6.7 Transition Control (address 06h) ...................................................................................... 49
6.8 DAC Channel Mute (address 07h) ................................................................................... 51
6.9 AOUTX Volume Control (addresses 08h- 0Fh) ............................................................ 51
6.10 DAC Channel Invert (address 10h) ................................................................................ 52
6.11 AINX Volume Control (address 11h-16h) ....................................................................... 52
6.12 ADC Channel Invert (address 17h) ................................................................................ 52
6.13 Status Control (address 18h).......................................................................................... 53
6.14 Status (address 19h) (Read Only)................................................................................. 53
6.15 Status Mask (address 1Ah) ............................................................................................ 54
6.16 MUTEC Pin Control (address 1Bh) ................................................................................ 54
7 APPENDIX A: EXTERNAL FILTERS ...................................................................................... 55
7.1 ADC Input Filter ............................................................................................................... 55
7.1.1 Passive Input Filter ............................................................................................. 56
7.1.2 Passive Input Filter w/Attenuation ....................................................................... 56
7.2 DAC Output Filter ............................................................................................................ 58
8 APPENDIX B: ADC FILTER PLOTS ....................................................................................... 59
9 APPENDIX C: DAC FILTER PLOTS ....................................................................................... 61
10 PARAMETER DEFINITIONS ................................................................................................. 63
11 REFERENCES ....................................................................................................................... 64
12 PACKAGE INFORMATION ................................................................................................... 65
12.1 Thermal Characteristics ................................................................................................ 65
13 ORDERING INFORMATION ................................................................................................. 66
14 REVISION HISTORY ............................................................................................................. 67
DS648PP2
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