CS1810XX Datasheet, PDF (24/54 Pages) Cirrus Logic – Digital Audio Networking Processor

CobraNet Hardware User’s Manual
Host Management Interface (HMI)
HREQ may be wired to a host interrupt or DMA request input. HREQ is used to signal the
host that data is available (read case, logic 0) or space is available in the host port data
channel (write case, logic 1).
The read and write case are distinguished by the HMI based on the preceding message.
Identify, Goto Translation (read), Goto Packet (read) and Goto Counters cause HREQ to
represent read status. Goto Translation (write) and Goto Packet (write) switch HREQ to
write mode. All other commands have no effect on HREQ operation.
In general, the host can read from the CS1810xx/CS4961xx when HREQ is low and can
write data to CS1810xx/CS4961xx when HREQ is high.
7.2 Host Port Timing - Motorola^® Mode
(C_L = 20 pF)
Parameter
Symbol
Min
Max
Unit
Address setup before HEN and HDS low
Address hold time after HEN and HDS low
t_mas
5
t_mah
5
-
ns
-
ns
Read
Delay between HDS then HEN low or HEN then HDS low
t_mcdr
0
Data valid after HEN and HDS low with HRW high
t_mdd
-
HEN and HDS low for read
t_mrpw
24
Data hold time after HEN or HDS high after read
t_mdhr
8
Data high-Z after HEN or HDS high after read
t_mdis
-
HEN or HDS high to HEN and HDS low for next read
t_mrd
30
HEN or HDS high to HEN and HDS low for next write
t_mrdtw
30
HR/W rising to HREQ falling
t_mrwirqh
-
-
ns
19
ns
-
ns
-
ns
18
ns
-
ns
-
ns
12
ns
Write
Delay between HDS then HEN low or HEN then HDS low
t_mcdw
0
Data setup before HEN or HDS high
t_mdsu
8
HEN and HDS low for write
t_mwpw
24
HRW setup before HEN and HDS low
t_mrwsu
24
HRW hold time after HEN or HDS high
t_mrwhld
8
Data hold after HEN or HDS high
t_mdhw
8
HEN or HDS high to HEN and HDS low with HRW high for
t_mwtrd
30
next read
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
HEN or HDS high to HEN and HDS low for next write
t_mwd
30
HRW rising to HREQ falling
t_mrwbsyl
-
-
ns
12
ns
NOTES:1. The system designer should be aware that the actual maximum speed of the communication port may
be limited by the firmware application. Hardware handshaking on the HREQ pin/bit should be observed
to prevent overflowing the input data buffer.
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©Copyright 2005 Cirrus Logic, Inc.
DS651UM23
Version 2.3