CS1810XX Datasheet, PDF (10/54 Pages) Cirrus Logic – Digital Audio Networking Processor

CobraNet Hardware User’s Manual
Pinout and Signal Descriptions
4.1 CS1810xx & CS4961xx Package Pinouts
4.1.1 CS1810xx/CS4961xx Pinout
Table 1 lists the pinout for the 144-pin LQFP CS1810xx/CS4961xx device. The interfaces
for these signals are expanded in the following sections.
Pin #
Pin Name
1
VCXO_CTRL
2
MCLK_SEL
3
DBDA
4
DBCK
5
NC
6
NC
7
NC
8
DAO_MCLK
9
TEST
10
VDDD
11
HS3
12
NC
13
GND
14
DAO2_LRCLK
15
DAO1_DATA3
16
DAO1_DATA2/HS2
17
DAO1_DATA1/HS1
18
VDDIO
19
DAO1_DATA0/HS0
20
DAO1_SCLK
21
GND
22
DAO1_LRCLK
23
UART_TX_OE
24
VDDD
25
UART_TXD
26
UART_RXD
27
GND
28
NC
29
DATA7
30
DATA6
31
DATA5
32
DATA4
33
VDDIO
34
DATA3
35
DATA2
36
GND
Table 1. CS1810xx/CS4961xx Pin Assignments
Pin #
Pin Name
37
DATA1
38
WE
39
DATA0
40
DATA15
41
DATA14
42
DATA13
43
DATA12
44
VDDIO
45
DATA11
46
DATA10
47
GND
48
DATA9
49
DATA8
50
NC
51
NC
52
NC
53
NC
54
VDDD
55
ADDR12
56
ADDR11
57
GND
58
ADDR9
59
ADDR8
60
VDDIO
61
ADDR7
62
ADDR6
63
GND
64
ADDR5
65
CS2
66
VDDD
67
ADDR4
68
ADDR3
69
GND
70
ADDR2
71
ADDR1
72
ADDR0
Pin #
Pin Name
73
VDDIO
74
ADDR10
75
ADDR14
76
GND
77
ADDR13
78
NC
79
NC
80
NC
81
NC
82
ADDR15
83
VDDD
84
ADDR16
85
ADDR17
86
GND
87
ADDR18
88
ADDR19
89
OE
90
CS1
91
VDDIO
92
MUTE
93
HRESET
94
GND
95
WATCHDOG
96
IOWAIT
97
REFCLK_IN
98
VDDD
99
GPIO0
100
GPIO1
101
GND
102
HACK
103
HDS
104
HEN
105
HADDR3
106
HADDR2
107
HR/W
108
GPIO2
Pin #
Pin Name
109
HADDR1
110
HADDR0
111
HDATA7
112
HDATA6
113
VDDIO
114
HDATA5
115
HDATA4
116
GND
117
HDATA3
118
HDATA2
119
VDDD
120
HDATA1
121
HDATA0
122
GND
123
XTAL_OUT
124
XTO
125
XTI
126
GND_a
127
FILT2
128
FILT1
129
VDDA
130
VDDD
131
DAI1_DATA3
132
DAI1_DATA2
133
GND
134
DAI1_DATA1
135
DAI1_DATA0
136
VDDIO
137
DAI1_SCLK
138
DAI1_LRCLK
139
GND
140
HREQ
141
NC
142
NC
143
IRQ1
144
IRQ2
10
©Copyright 2005 Cirrus Logic, Inc.
DS651UM23
Version 2.3