CS1810XX Datasheet, PDF (15/54 Pages) Cirrus Logic – Digital Audio Networking Processor

CobraNet Hardware User’s Manual
Pinout and Signal Descriptions
4.2.7 System Signals
Use these CS1810xx/CS4961xx signals stricktly in the manner described in CM-2
Schematics (Section 9.2 on page 44). Each signal is briefly described below.
Signal
VCXO_CTRL
MCLK_SEL
DBDA, DBCK
TEST
DATA[15:0]
ADDR[19:0]
WE
CS1
CS2
OE
IOWAIT
GPIO[2:0]
XTI
XTO
XTAL_OUT
FILT2, FILT1
DAO_MCLK
HS[3:0]
Description
CS1810xx/CS4961xx
Pin #
A Delta-sigma DAC Output for Controlling the On-board VCXO
1
Control Signal for Selecting MCLK Sources
2
I2C Debugger Interface
3, 4
Used for testing during manufacturing. Keep grounded for normal
operation.
9
Data Bus for Flash & Ethernet Controller(s)
29-32, 34, 35, 37, 39-43,
45, 46, 48, 49
Address Bus for Flash & Ethernet Controller(s)
55, 56, 58, 59, 61, 62, 64,
67, 68, 70-72, 74, 75, 77,
82, 84, 85, 87, 88
Write Enable for Flash and Ethernet Controller(s)
38
Chip Select for Flash Memory Device
90
Chip Select for Ethernet Controller(s)
65
Output Enable
89
Wait State Signal from Ethernet Controller(s)
96
General-purpose I/O Signals
99, 100, 108
Reference Clock Input / Crystal Oscillator Input
125
Crystal Oscillator Output
124
A Buffered Version of XTI
123
PLL Loop Filter
127, 128
MCLK Input
8
CS1810xx/CS4961xx Boot Mode Selection
11, 16, 17, 19
DS651UM23
©Copyright 2005 Cirrus Logic, Inc.
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Version 2.3