CS4340_05 Datasheet, PDF (18/25 Pages) Cirrus Logic – 24-Bit, 96 kHz Stereo DAC for Audio

CS4340
LRCK
SCLK
SDIN 0
Left Channel
Right Channel
23 22 21 20 19 18
76543210
23 22 21 20 19 18
Figure 17. CS4340 Format 2 - Right Justified, 24-Bit Data
32 clocks
76543210
LRCK
SCLK
Left Channel
Right Channel
SDIN
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Figure 18. CS4340 Format 3 - Right Justified, 16-Bit Data
32 clocks
4.4 De-Emphasis
The device includes on-chip digital de-emphasis. Figure 19 shows the de-emphasis curve for Fs equal to 44.1 kHz.
The frequency response of the de-emphasis curve will scale proportionally with changes in sample rate, Fs.
Pin 8 is available for de-emphasis control and selects the 44.1 kHz de-emphasis filter. If the Internal Serial Clock is
used, pin 3 is also available for additional de-emphasis control and, in combination with pin 8, selects either the 32,
44.1, or 48 kHz de-emphasis filter. Please see Table 6 for the desired de-emphasis control.
Gain
dB
0dB
T1=50 µs
-10dB
T2 = 15 µs
F1
3.183 kHz
F2 Frequency
10.61 kHz
Figure 19. De-Emphasis Curve
Internal SCLK
DEM1 DEM0 Description
0
0 Disabled
0
1 44.1 kHz
1
0
48 kHz
1
1
32 kHz
External SCLK
DEM0 Description
0 Disabled
1 44.1 kHz
Table 6. De-Emphasis Control
18
DS297F3