CDB4265 Datasheet, PDF (11/30 Pages) Cirrus Logic – Evaluation Board for CS4265

CDB4265
4. FPGA REGISTER QUICK REFERENCE
This table shows the register names and their associated default values.
Addr Function
01h ^{Code Rev. ID}
7
Rev7
6
Rev6
5
Rev5
4
Rev4
3
Rev3
2
Rev2
02h ^{MCLK Source}
03h ^Subclock
Source
03h ^{CS4265 SDIN}
Source
04h ^Transmitter
SDIN Source
x
x
Reserved Reserved
0
0
x
MCLK1
1
x
MCLK0
0
x
Reserved
0
x
Reserved
0
Reserved Reserved Reserved Reserved Reserved Reserved
0
0
0
1
0
0
Reserved SDIN2.2 SDIN2.1 SDIN2.0 Reserved SDIN1.2
0
0
0
0
0
0
Reserved Reserved Reserved Reserved Reserved TXSDIN2
0
0
0
1
0
0
1
Rev1
x
Reserved
0
SUBCLK1
0
SDIN1.1
0
TXSDIN1
0
0
Rev0
x
Reserved
0
SUBCLK0
1
SDIN1.0
0
TXSDIN0
1
DS657DB1
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