CAT34RC02_05 Datasheet, PDF (2/14 Pages) Catalyst Semiconductor – 2-kb I2C Serial EEPROM, Serial Presence Detect

CAT34RC02
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias .................. -55°C to +125°C
Storage Temperature ........................ -65°C to +150°C
Voltage on Any Pin with
Respect to Ground⁽¹⁾ ............ -2.0 V to VCC + 2.0 V
Voltage on A₀ .................................................. -2.0 V to +12.0 V
V_CC with Respect to V_SS .............................. -2.0 V to +7.0 V
*COMMENT
Stresses above those listed under “Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions
outside of those listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for extended periods
may affect device performance and reliability.
RELIABILITY CHARACTERISTICS⁽²⁾
Symbol
Parameter
NEND(*)
t _TDR(*)
r _VZAP(*)
a _ILTH(3)
Endurance
Data Retention
ESD Susceptibility
Latch-up
(*) Page Mode, VCC = 5 V, 25°C
P _{D.C. OPERATING CHARACTERISTICS}
V_CC = 1.7 V to 5.5 V, unless otherwise specified.
Min
1,000,000
100
4000
100
Units
Program/ Erase Cycles
Years
Volts
mA
d _Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
e _ICC
Power Supply Current (Read)
f_SCL = 100 kHz
1
mA
I_CC
u _ISB(4)
Power Supply Current (Write)
Standby Current (V_CC = 5.0 V)
f_SCL = 100 kHz
V_IN = GND or V_CC
3
mA
1
µA
tin ^ILI
Input Leakage Current
VIN = GND to VCC
1
µA
ILO
Output Leakage Current
VOUT = GND to VCC
1
µA
V_IL
Input Low Voltage
–1
V_CC x 0.3
V
V_IH
Input High Voltage
V_CC x 0.7
V_CC + 1.0 V
n _{VOL1 Output Low Voltage (VCC = 3.0 V)}
I_OL = 3 mA
0.4
V
o VOL2 Output Low Voltage (VCC = 1.7 V) IOL = 1.5 mA
0.5
V
VHV
RSWP Set/Clear Overdrive
VHV - VCC > 4.8 V
7
cA₀ High Voltage
10
V
CAPACITANCE T_A = 25°C, f = 400 kHz, V_CC = 5 V
is ^Symbol
Test
Conditions
Min
Typ
Max Units
C_I/O(2)
D^CIN(2)
Input/Output Capacitance (SDA)
Input Capacitance (other pins)
V_I/O = 0 V
VIN = 0 V
8
pF
6
pF
ZWPL
WP Input Impedance
VIN < 0.5 V
5
70
kΩ
Z_WPH
WP Input Impedance
V_{IN >} V_CC x 0.7
500
kΩ
Note:
(1) The DC input voltage on any pin should not be lower than -0.5 V or higher than V_CC + 0.5 V. During transitions, the voltage on any pin
may undershoot to no less than -2.0 V or overshoot to no more than VCC + 2.0 V, for periods of less than 20 ns. The maximum DC
voltage on address pin A₀ is +12.0 V.
(2) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100
and JEDEC test methods.
(3) Latch-up protection is provided for stresses up to 100 mA on I/O pins from -1.0 V to V_CC + 1.0 V.
(4) Standby Current, I_SB = 10 µA max at extended temperature range.
Doc. No. 1052, Rev. O
2
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice