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CM1231 Datasheet, PDF (9/11 Pages) California Micro Devices Corp – Two-Channel PicoGuard XPTM ESD Clamp Protection Array
Issue X-1
CM1231
CM1231 Application and Guidelines
The CM1231 has an integrated zener diode between
VP and VN (for each of the two stages). This greatly
reduces the effect of supply rail inductance L2 on VCL
by clamping VP at the breakdown voltage of the zener
diode. However, for the lowest possible VCL, especially
when VP is biased at a voltage significantly below the
zener breakdown voltage, it is recommended that a
0.22μF ceramic chip capacitor be connected between
VP and the ground plane. With the CM1231, this
additional bypass capacitor is generally not required.
As a general rule, the ESD Protection Array should be
located as close as possible to the point of entry of
expected electrostatic discharges. The power supply
bypass capacitor mentioned above should be as close
to the VP pin of the Protection Array as possible, with
minimum PCB trace lengths to the power supply,
ground planes and between the signal input and the
ESD device to minimize stray series inductance.
Figure 14. Typical Layout with Optional VP Cap
Footprint
Additional Information
See also California Micro Devices Application Note AP-209, “Design Considerations for ESD Protection,” in the
Applications section at www.calmicro.com.
© 2007 California Micro Devices Corp. All rights reserved.
12/17/07
490 N. McCarthy Blvd., Milpitas, CA 95035-5112 ● Tel: 408.263.3214 ● Fax: 408.263.7846 ● www.cmd.com 9