CM1231 Datasheet, PDF (3/11 Pages) California Micro Devices Corp – Two-Channel PicoGuard XPTM ESD Clamp Protection Array

Issue X-1
CM1231
CM1231 Architecture Overview
The PicoGuard XP^TM two-stage per channel matched
clamp architecture with isolated clamp rails features a
series element to radically reduce the residual ESD
current (I_RES) that enters the ASIC under protection
(see Figure 3). From stage 1 to stage 2, the signal lines
go through matched dual 1Ω resistors.
The function of the series element (dual 1Ω resistors
for the CM1231) is to optimize the operation of the
stage two diodes to reduce the final I_RES current to a
minimum while maintaining an acceptable insertion
impedance that is negligible for the associated
signaling levels.
Each stage consists of a traditional low-cap Dual Rail
Clamp structure which steer the positive or negative
ESD current pulse to either the positive (V_P) or
negative (V_N) supply rail.
A zener diode is embedded between V_P and V_N,
offering two advantages. First, it protects the V_CC rail
against ESD strikes. Second, it eliminates the need for
an additional bypass capacitor to shunt the positive
ESD strikes to ground.
The CM1231 therefore replaces as many as 7 discrete
components, while taking advantage of precision
internal component matching for improved signal
integrity, which is not otherwise possible with discrete
components at the system level.
Advantages of the CM1231 Dual
Stage ESD Protection Architecture
Figure 4 illustrates a single stage ESD protection
device. The inductor element represents the parasitic
inductance arising from the bond wire and the PCB
trace leading to the ESD protection diodes.
Connector
ASIC
Bond Wire
Inductance
ESD
Stage
Figure 4. Single Stage ESD Protection Model
Figure 5 illustrates one of the two CM1231 channels.
Similarly, the inductor elements represent the parasitic
inductance arising from the bond wire and PCB traces
leading to the ESD protection diodes as well.
VP
I_ESD
VN
Positive Supply Rail
1Ω
IR ESID U A L
Ground Rail
V_{C C}
Circuitry
Under
Protection
Bond Wire
Inductance
Connector
1^st
Stage
Series
Element
Bond Wire
Inductance
ASIC
2^nd
Stage
Figure 3. CM1231 Block Diagram (I_ESD Flow During
a Positive Strike)
Figure 5. CM1231 Dual Stage ESD Protection
Model
© 2007 California Micro Devices Corp. All rights reserved.
12/17/07
490 N. McCarthy Blvd., Milpitas, CA 95035-5112 ● Tel: [phone] ● Fax: [phone] ● www.cmd.com 3