EP7309 Datasheet, PDF (33/46 Pages) Cirrus Logic – HIGH PERFORMANCE LOW POWER SYSTEM ON CHIP ENHANCED DIGITAL AUDIO INTERFACE

256-Ball PBGA Pinout (Top View))
EP7309
High-Performance, Low-Power System on Chip
1
2
3
4
A VDDIO nCS[4] nCS[1]
N/C
5
6
7
8
9
10
11
12
13
14
15
16
N/C
DD[1]
M
VDDIO
D[0]
D[2]
A[3]
VDDIO
A[6] MOSCOUT VDDOSC VSSIO A
B nCS[5] VDDIO nCS[3] nMOE VDDIO
N/C
DD[2]
CL[1] VDDCORE D[1]
A[2]
A[4]
A[5] WAKEUP VDDIO nURESET B
C VDDIO EXPCLK VSSIO VDDIO VSSIO VSSIO VSSIO VDDIO VSSIO VSSIO VSSIO VDDIO VSSIO VSSIO nPOR nEXTPWR C
D WRITE EXPRDY VSSIO VDDIO nCS[2] nMWE
N/C
CL[2] VSSRTC D[4] nPWRFL MOSCIN VDDIO VSSIO D[7]
D[8] D
E RXD[2]
PB[7]
TDI
WORD VSSIO nCS[0]
N/C
FRM
A[0]
F PB[5]
PB[3]
VSSIO
TXD[2]
RUN/
CLKEN
VSSIO
N/C
DD[3]
A[1]
D[5]
VSSOSC
VSSIO
nMEDCHG/
nBROM
VDDIO
D[9]
D[10] E
D[6] VSSRTC BATOK nBATCHG VSSIO D[11] VDDIO F
G PB[1]
VDDIO
TDO
PB[4]
PB[6] VSSRTC VSSRTC DD[0]
D[3] VSSRTC A[7]
A[8]
A[9]
VSSIO D[12]
D[13] G
H PA[7]
PA[5]
VSSIO
PA[4]
PA[6]
PB[0]
PB[2] VSSRTC VSSRTC A[10]
A[11]
A[12]
A[13]
VSSIO D[14]
D[15] H
J PA[3]
PA[1]
VSSIO
PA[2]
PA[0]
TXD[1]
CTS VSSRTC VSSRTC A[17]
A[16]
A[15]
A[14]
nTRST D[16]
D[17] J
K LEDDRV PHDIN VSSIO
DCD nTEST[1] EINT[3] VSSRTC ADCIN COL[4] TCLK
D[20]
D[19]
D[18]
VSSIO VDDIO VDDIO K
L RXD[1]
DSR
VDDIO
nEINT[1]
PE[2]/
CLKSEL
VSSRTC
PD[0]/
LEDFLSH
VSSRTC
COL[6]
D[31] VSSRTC A[22]
A[21]
VSSIO A[18]
M nTEST[0] nEINT[2]
VDDIO
PE[0]/
BOOTSEL[0]
TMS
VDDIO SSITXFR DRIVE[1] FB[0] COL[0] D[27]
VSSIO
A[23]
VDDIO A[20]
N
nEXTFIQ
PE[1]/
BOOTSEL[1]
VSSIO
VDDIO
PD[5]
PD[2] SSIRXDA ADCCLK SMPCLK COL[2] D[29]
D[26] HALFWORD VSSIO D[22]
A[19] L
D[21] M
D[23] N
P VSSRTC RTCOUT VSSIO VSSIO VDDIO VSSIO VSSIO VDDIO VSSIO VDDIO VSSIO VSSIO VDDIO VSSIO D[24] VDDIO P
R RTCIN VDDIO PD[4]
PD[1] SSITXDA nADCCS VDDIO ADCOUT COL[7] COL[3] COL[1] D[30]
A[27]
A[25] VDDIO A[24] R
T VDDRTC PD[7]
PD[6]
PD[3] SSICLK SSIRXFR VDDCORE DRIVE[0] FB[1] COL[5] VDDIO
BUZ
D[28]
A[26]
D[25] VSSIO T
256-Ball PBGA Ball Listing
The list is ordered by ball location.
Ball Location
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
Table U. 256-Ball PBGA Ball Listing
Name
VDDIO
nCS[4]
nCS[1]
N/C
N/C
DD[1]
M
VDDIO
D[0]
D[2]
A[3]
Type
Description
Pad power Digital I/O power, 3.3V
O
Chip select out
O
Chip select out
O
O
O
LCD serial display data
O
LCD AC bias drive
Pad power Digital I/O power, 3.3V
I/O
Data I/O
I/O
Data I/O
O
System byte address
Table U. 256-Ball PBGA Ball Listing (Continued)
Ball Location
A12
A13
A14
A15
A16
B1
B2
B3
B4
B5
B6
Name
VDDIO
A[6]
MOSCOUT
VDDOSC
VSSIO
nCS[5]
VDDIO
nCS[3]
nMOE
VDDIO
N/C
Type
Description
Pad power Digital I/O power, 3.3V
O
System byte address
O
Main oscillator out
Oscillator
power
Oscillator power in, 2.5V
Pad ground I/O ground
O
Chip select out
Pad power I/O ground
O
Chip select out
O
ROM, expansion OP enable
Pad power Digital I/O power, 3.3V
O
DS507PP1
Copyright 2001 Cirrus Logic (All Rights Reserved)
33