EP7309 Datasheet, PDF (18/46 Pages) Cirrus Logic – HIGH PERFORMANCE LOW POWER SYSTEM ON CHIP ENHANCED DIGITAL AUDIO INTERFACE

EP7309
High-Performance, Low-Power System on Chip
SSI2 Interface
Parameter
SSICLK period (slave mode)
SSICLK high time
SSICLK low time
SSICLK rise/fall time
SSICLK rising edge to RX and/or TX frame sync high time
SSICLK rising edge to RX and/or TX frame sync low time
SSIRXFR and/or SSITXFR period
SSIRXDA setup to SSICLK falling edge time
SSIRXDA hold from SSICLK falling edge time
SSICLK rising edge to SSITXDA data valid delay time
SSITXDA valid time
Symbol
t_{clk_per}
t_{clk_high}
t_{clk_low}
t_clkrf
t_FRd
t_FRa
t_{FR_per}
t_RXs
t_RXh
t_TXd
t_TXv
Min
0
925
925
750
30
40
Max
512
1025
1025
7
528
448
80
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SSI
CLK
t_FRd
SSIRXFR/
SSITXFR
SSI
RXDA
t_TXd
SSI
TXDA
t_{clk_per}
t_clkrf
t_FRa
t_RXh
t_RXs
D7
t_{clk_high}
t_{FR_per}
t_{clk_low}
D2
D1
D0
D7
D2
D1
D0
t_TXv
Figure 7. SSI2 Interface Timing Measurement
18
Copyright 2001 Cirrus Logic (All Rights Reserved)
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