AMC6821 Datasheet, PDF (33/47 Pages) Burr-Brown (TI) – Analog Monitor and Control Circuit

AMC6821
www.ti.com
SBAS386A – MAY 2006 – REVISED MAY 2006
Configuration Register 4 (Address 0x04, Value After Power-On Reset = 0x08)
BIT
NAME
R/W
7
TODIS
R/W
6
PSPR
R/W
5 TACH-FAST R/W
4
OVREN
R/W
3
Reserved
R
2
Reserved
R
1
Reserved
R
0
Reserved
R
DEFAULT
0
0
0
0
1
0
0
0
DESCRIPTION
TODIS = 0, SMBus timeout enabled (default); TODIS = 1, SMBus timeout disabled. The
AMC6821 includes an SMBus timeout feature. Timeout is enabled (TODIS = 0) if a
single clock is held low longer than 30ms (±10%). When this timeout occurs, the
AMC6821 releases the bus (stops driving the bus and lets SCLK and SDA float high),
resets the communication, and is able to receive new START conditions. When TODIS
= 1, timeout is disabled. In this case, when the clock resumes after being held low for
longer than 30ms, the AMC6821 continues the bus communication at the current point.
Number of pulses per revolution of the fan. Power-on default = 0. PLSPR = 0 for two
pulses/revolution (default), PLSPR = 1 for four pulses per revolution.
When TACH-FAST = 1, the TACH data reading is updated every 250ms. This monitor is
the fast RPM monitor. When TACH-FAST = 0, the TACH data reading is updated every
second. Default = 0, power-on default = 0.
Setting this bit to '1' enables the OVR pin. Clearing this bit ('0') disables the OVR pin
(high-impedance). Default = 0.
Read back '1'. Reading this bit returns 1, not 0.
Read-back '0'.
Read-back '0'.
Read-back '0'.
Writing the reserved bit has no effect.
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