CS42L50 Datasheet, PDF (24/48 Pages) Cirrus Logic – Low Voltage, Stereo CODEC with headphone Amp

CS42L50
Ramped Digital and Analog
Soft Ramp allows digital level changes, both muting and attenuation, to be implemented by incrementally
ramping, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock pe-
riods. Analog level changes will occur in 1 dB steps on a signal zero crossing. The analog level change
will occur after a timeout period of 512 sample periods (10.7 ms at 48 kHz sample rate) if the signal does
not encounter a zero crossing. The zero cross function is independently monitored and implemented for
each channel.
Note: Ramped Digital and Analog is not available in Double Speed Mode.
4.2.4 POWER DOWN HEADPHONE AMPLIFIER (PDNHP)
Default = 0
0 - Disabled
1 - Enabled
Function:
The headphone amplifier will independently enter a low-power state when this function is enabled.
4.2.5 POWER DOWN LINE AMPLIFIER (PDNLN)
Default = 0
0 - Disabled
1 - Enabled
Function:
The line output amplifier will independently enter a low-power state when this function is enabled.
4.2.6 POWER DOWN (PDN)
Default = 1
0 - Disabled
1 - Enabled
Function:
The entire DAC device will enter a low-power state when this function is enabled, and the contents of the
control registers are retained in this mode. The power-down bit defaults to ‘enabled’ on power-up and
must be disabled before normal operation will begin.
4.2.7 CONTROL PORT ENABLE (CP_EN)
Default = 0
0 - Disabled
1 - Enabled
Function:
The DAC will enter control port mode when this bit is enabled. This bit must be set prior to writing to the
control port.
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DS544PP1