CS89712 Datasheet, PDF (119/170 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH 10BASE-T ETHERNET CONTROLLER

CS89712
3.18.4 Receiver Control Register (RxCTL, address offset 104h)
7
PromiscuousA
C
CRCerrorA
6
IAHashA
B
BroadcastA
5:0
000101
A
IndividualA
F
9
MulticastA
E
ExtradataA
8
RxOKA
D
RuntA
RxCTL has two functions: Bits 8, C, D, and E define what types of frames to accept. Bits 6, 7, 9, A, and B configure
the Destination Address filter. See Section 2.32.7, “Receive Ethernet Port Locations”.
Bit
5:0
6
7
8
9
A
B
C
D
E
Description
000101: These bits provide an internal address used by the CS89712 to identify this as register
5, the Receiver Control Register. For a received frame to be accepted, the Destination
Address of that frame must pass the filter criteria found in Bits 6, 7, 9, A, and B (see Section
2.32.7, “Receive Ethernet Port Locations”).
IAHashA: When set, receive frames are accepted when the Destination Address is an Individ-
ual Address that passes the hash filter.
PromiscuousA: Frames with any address are accepted when this bit is set.
RxOKA: When set, the CS89712 accepts frames with correct CRC and valid length (valid
length is: 64 bytes <= length <= 1518 bytes).
MulticastA: When set, receive frames are accepted if the Destination Address is an Multicast
Address that passes the hash filter.
IndividualA: When set, receive frames are accepted if the Destination Address matches the
Individual Address found at Ethernet Port offset address 0158h to 015Dh.
BroadcastA: When set, receive frames are accepted if the Destination Address is FFFF FFFF
FFFFh.
CRCerrorA: When set, receive frames that pass the Destination Address filter, but have a bad
CRC, are accepted. When clear, frames with bad CRC are discarded. See Note 1.
RuntA:When set, receive frames that are smaller than 64 bytes, and that pass the Destination
Address filter are accepted. When clear, received frames less that 64 bytes in length are dis-
carded. The CS89712 discards any frame that is less than 8 bytes. See Note 1.
ExtradataA: When set, receive frames longer than 1518 bytes and that pass the Destination
Address filter are accepted. The CS89712 accepts only the first 1518 bytes and ignores the
rest. When clear, frames longer than 1518 bytes are discarded. See Note 1.
Table 69. Receiver Control
After reset, if no EEPROM is found by the CS89712, then the register has the following initial state. If an EEPROM
is found, then the register’s initial value may be set by the EEPROM. See Section 2.32.7, “Receive Ethernet Port
Locations”.
Reset value is: 0000 0000 0000 0101
Notes: 1. Typically, when bits CRCerrorA, RuntA and ExtradataA are cleared (meaning bad frames are being
discarded), then the corresponding bits CRCerroriE, RuntiE and ExtradataiE should be set in register 3
(Receiver Configuration register) to allow the device driver to keep track of discarded frames.
DS502PP2
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