CS89712 Datasheet, PDF (1/170 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH 10BASE-T ETHERNET CONTROLLER

CS89712
High-Performance, Low-Power System-on-Chip with 10BASE-T Ethernet Controller
Features
l ARM720T (ARM7 TDMI) processor
– 8 Kbytes of four-way set-associative cache
– MMU with 64-entry TLB
– Write Buffer
– Thumb code support enabled
l Dynamically clocked at 18, 36, 49 or 74 MHz
l 10 Mbit Ethernet Controller with integrated PHY
l Comprehensive Suite of Software Drivers
l On-Chip Transmit and Receive RAM Buffers
l 10BASE-T Port with Analog Filters provides
automatic polarity detection and correction
l Programmable Transmit Features:
– Automatic Re-transmission on Collision
– Automatic Padding and CRC Generation
l Programmable Receive Features:
– Early Interrupts for Frame Pre-Processing
– Automatic Rejection of Erroneous Packets
Description
The low-power high-performance CS89712 is designed
for ultra-low-power communication applications such as
VoIP telephones, industrial control, data acquisition,
special purpose servers and RF to Ethernet bridges. The
core-logic functionality of the device is built around an
ARM720T processor with 8 Kbytes of four-way set-asso-
ciative unified cache and a write buffer. Incorporated into
the ARM720T is an enhanced memory management unit
(MMU) which allows for support of sophisticated operat-
ing systems like embedded Linux.
The CS89712 Ethernet port includes on-chip RAM and
10BASE-T transmit and receive filters.
ORDERING INFO
CS89712-CB
0 to 70° C
256 Ball PBGA 17x17 mm
3.6864 MHZ
32.768 KHZ
NPOR, RUN,
RESET, WAKEUP
BATOK, EXPWR
PWRFL, BATCHG
EINT[1-2], FIQ,
MEDCHG
FLASHING LED DRIVE
PORTS A, B, D (8-BIT)
PORT E (3-BIT)
KEYBD DRIVERS (0–7)
BUZZER DRIVE
DC-TO-DC
SSI (ADC)
INTERFACE
DAI / SSI / ADC
INTERFACE
PLL
32.768-KHZ
OSCILLATOR
STATE CNTRL
POWER
MANAGEMENT
INTERRUPT
CONTROLLER
RTC
GPIO
PWM
SSI1 (ADC)
DAI
SSI2
CODE
10BASE-T
ETHERNET
ARM720T
ARM7TD
8-KBYTE
CACHE
MMU
WRITE
BUFFER
TIMER
ON-CHIP
BOOT ROM
INTERNAL DATA BUS
MEMORY CONTROLLER
CL-PS6700
INTFCE.
EXPANSION
CONTROL
SDRAM CNTRL
INTERNAL ADDRESS BUS
LCD
ICE-JTAG
LCD
CONTROLLER
ON-CHIP SRAM
48K BYTES
IrDA
EPB BUS
EPB
UART
UART
D[0-31]
PB[0:1], NCS[4:5]
EXPCLK, WORD,
NCS[0:3], EXPRDY,
WRITE
MOE, MWE, SDCLK,
SDQM[0:1], SDRAS,
SDCAS
A[0-27],
DRA[0-14]
TEST AND
DEVELOPMENT
LCD DRIVE
LED AND
PHOTODIODE
ASYNC
INTERFACE 1
ASYNC
INTERFACE 2
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
P.O. Box 17847, Austin, Texas 78760
[phone] FAX: [phone]
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2001
(All Rights Reserved)
FEB ‘01
DS502PP2
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