AZP94_1205 Datasheet, PDF (8/9 Pages) Arizona Microtek, Inc – PECL/ECL ÷1, ÷2 Clock Generation Chip with Tristate Compatible Outputs

Arizona Microtek, Inc.
AZP94
PECL/ECL ÷1, ÷2 Clock Generation Chip
with Tristate Compatible Outputs
Table 8 - AC Characteristics
AC Characteristics (V_EE = -3.0V to -5.5V; V_CC=GND or V_EE=GND; V_CC = +3.0V to +5.5V)
Symbol
Characteristic
-40°C
0°C
25°C
85°C
Unit
Min Typ Max Min Typ Max Min Typ Max Min Typ Max
Propagation Delay
t_PLH/t_PHL
t_SKEW
D to Q/Q¯¹
EN to
Q_HG/Qb_HG1,2
Duty Cycle Skew³
450
3000
5 20
450
3000
5 20
450
3000
5 20
450 ps
3000 ps
5 20 ps
Vpp (AC) Input Swing⁴
150
1000 150
1000 150
1000 150
1000 mV
t_r/t_f
Output Rise/Fall¹
(20% - 80%)
100
240 100
240 100
240 100
240 ps
1 _{Specified with each output terminated through 50Ω resistors to VCC - 2V.}
2
Specified from 50% EN input edge to V_OH min to V_OL max of the Q/Q¯ outputs
3 _{Duty cycle skew is the difference between a tPLH and tPHL propagation delay through a device.}
4 _{VPP is the peak-to-peak differential input swing for which AC parameters are guaranteed.}
www.azmicrotek.com
[phone]
8
Request a Sample
May 2012, Rev 2.0