AZP94_1205 Datasheet, PDF (2/9 Pages) Arizona Microtek, Inc – PECL/ECL ÷1, ÷2 Clock Generation Chip with Tristate Compatible Outputs

Arizona Microtek, Inc.
AZP94
PIN DESCRIPTION AND CONFIGURATION
PECL/ECL ÷1, ÷2 Clock Generation Chip
with Tristate Compatible Outputs
Table 1 - Pin Description
Pin Name Type
1 EN-SEL Input
2
D
Input
3
V_BB
Input
4
EN Input
5 DIV-SEL Input
6
Q¯
Output
7
Q
Output
8
V_CC
Power
9
V_EE
Power
Function
Enable Polarity Select
Data Input
Reference Voltage
Output Enable
Divide Select
Inverted PECL Output
PECL Output
Positive Supply
Negative Supply
EN-SEL ¹
D2
V_{BB 3}
EN ₄
8 ^VCC
7Q
V_EE
6Q
5 DIV-SEL
Figure 1 - Pin Configuration
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May 2012, Rev 2.0