AZT70 Datasheet, PDF (6/12 Pages) Arizona Microtek, Inc – Programmable Capacitive Tuning IC

Arizona Microtek, Inc.
AZT70
Programmable Capacitive Tuning IC
Table 4 – Data writing sequence for EEPROM
Step
Action
1
Determine the desired capacitor control word with the operational power supply voltage and
desired oscillator conditions
2
Set the V_DD supply voltage to +5.0V
3
If EEPROM is not already erased, erase EEPROM (see ERASING THE EEPROM)
4
Read the current state of the EEPROM bits (see READING BACK FROM THE EEPROM)
5
Compare the desired control word to the stored EEPROM control word. Count the number of
differences so as to prevent double/redundant writing
6
One bit at a time, load the first desired control word bit (bit selection for EEPROM is active LOW)
7
Set the PV pin to +6V (≥5.6V, ≤6.1V) with the pulse and idle shown in timing diagram (Figure 8)
8
Progress through all necessary control word bits by repeating steps 5 & 6 until all bits are set to the
desired control word.
9
Verify the correct EEPROM contents by reading back the individual bits
For an example of writing bits into the EEPROM, suppose the desired capacitance is 3.43pF. The control word becomes
‘00000010100’ (Figure 6). Also suppose the EEPROM bits have been erased and therefore logic high (The AZT70 is
initially shipped in this condition). Since bit0 is the first bit to be loaded, the bit sequence becomes 0-0-1-0-1-0-0-0-0-0-0.
However, as described before, selecting bits for the EEPROM are active LOW, which will invert the logical values in the
sequence to 1-1-0-1-0-1-1-1-1-1-1 (Figure 7). Note the differences between the EEPROM bits and the converted control
word. Since there are 2 differences, two write cycles are required as only 1 bit should be written at a time. Figure 8 shows
the timing for bit2 while Figure 9 shows the timing for bit4.
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
bit 8
bit 9 bit 10
Figure 6 – Desired control word
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
bit 8
bit 9 bit 10
DA
difference
difference
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
bit 8
bit 9 bit 10
EEPROM
Figure 7 – Converted control word and differences from known EEPROM states
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May 2012, Rev 1.2