AZP53_13 Datasheet, PDF (6/13 Pages) Arizona Microtek, Inc – Low Phase Noise Sine Wave / CMOS to LVPECL Buffer / Translator

Arizona Microtek, Inc.
AZP53
Output
Stage
V_bp ^M1
V_DD (+3.3 V)
M2
21.1mA
21.1mA
21.1mA - High
D
M3
M4 _{5.1mA - Low}
Low Phase Noise Sine Wave/CMOS
to LVPECL Buffer/Translator
V_DD (+3.3 V) _External
Circuitry
130Ω
130Ω
Q
Q
82Ω
82Ω
V_bn
M5
16mA
Figure 5 - Dual Supply Output Termination
THREE RESISTOR TERMINATION
Another termination variant eliminates the need for the additional supply (Figure 6). Alternately three resistors and
one capacitor accomplish the same termination and reduce power consumption.
Output
Stage
V_bp ^M1
V_DD (+3.3 V)
M2
21.1mA
21.1mA
External
Circuitry
Q
Q
21.1mA - High
D
M3
M4 _{5.1mA - Low}
50Ω
50Ω
V_bn
M5
16mA
0.01µF
50Ω
Figure 6 - Three Resistor Termination
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Mar 2013, Rev 2.2