 English |
|
|
|
|
|
|
|
| AZP53_13 Datasheet, PDF (3/13 Pages) Arizona Microtek, Inc – Low Phase Noise Sine Wave / CMOS to LVPECL Buffer / Translator | |||
| |||
| ◁ |
Arizona Microtek, Inc.
AZP53
Low Phase Noise Sine Wave/CMOS
to LVPECL Buffer/Translator
ENGINEERING NOTES
FUNCTIONALITY
The AZP53 is one of a family of parts that provide options of fixed ÷1, fixed ÷2 and selectable ÷1, ÷2 modes as well as
active high enable or active low enable to oscillator designers. Table 2 details the differences between the parts to assist
designers in selecting the optimal part for their design.
Table 3 lists the specific AZP53 functional operation.
Figure 2 plots the S-parameters of the D input. S-parameter and IBIS model files for the AZP53 are also available for
download.
Table 2 - AZP51-54 & AZP63 Family
Part Number
AZP51
AZP52
AZP53
AZP54
AZP63
Divide Ratio
÷1
÷2
Selectable ÷1 or ÷2
÷1
Selectable ÷1 or ÷2
EN Logic
active HIGH
active HIGH
selectable
active LOW
selectable
EN pull-
up/pull-down
Pull-up
Pull-up
selectable
Pull-down
selectable
Bandwidth
> 800MHz
> 800MHz
> 800MHz
> 800MHz
⥠1GHz
Table 3 - AZP53 Functional Operation, ÷1 mode
Part Number
AZP53
1 Not connected
2 Don't care
3 Tri-State
EN_SEL
High, NC1
Inputs
EN
Low, NC1
High
High, NC1
Low
Low
DIV_SEL
Low, NC1
High
Outputs
DQ
Q
Low Low
High
High High
Low
X2
Z3
Z3
Low Low
High
High High
Low
X2
Z3
Z3
Divide Ratio
÷1
÷2
www.azmicrotek.com
+1-480-962-5881
3
Request a Sample
Mar 2013, Rev 2.2
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese