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HCMS-2819 Datasheet, PDF (4/12 Pages) AVAGO TECHNOLOGIES LIMITED – High Performance CMOS 5x7 AlphaNumeric InGaN Blue Display
Electrical Description
Pin Function Description
RESET (RST)
DATA IN (DIN)
DATA OUT (DOUT)
CLOCK (CLK)
REGISTER SELECT (RS)
CHIP ENABLE (CE)
OSCILLATOR SELECT
OSCILLATOR (OSC)
BLANK (BL)
GNDLED
GNDLOGIC
VLED
VLOGIC
Sets Control Register bits to logic low. The Dot Register contents are unaffected by the Reset
pin. (logic low = reset; logic high = normal operation)
Serial Data input for Dot or Control Register data. Data is entered on the rising edge of the Clock
input.
Serial Data out put for Dot or Control Register data. This pin is used for cascading multiple
displays.
Clock input for writing Dot or Control Register data. When Chip Enable is logic low, data is
entered on the rising Clock edge.
Selects Dot Register (RS = logic low) or Control Register (RS = logic high) as the destination for
serial data entry. The logic level of RS is latched on the falling edge of the Chip Enable input.
This input must be a logic low to write data to the display. When CE returns to logic high and
CLK is logic low, data is latched to either the LED output drivers or a Control Register.
Selects either an internal or external display oscillator source. (SEL) (logic low = External Display
Oscillator; logic high = Internal Display Oscillator).
Output for the Internal Display Oscillator (SEL = logic high) or input for an External Display Oscil-
lator (SEL = logic low).
Blanks the display when logic high. May be modulated for brightness control.
Ground for LED drivers
Ground for logic.
Positive supply for LED drivers
Positive supply for logic.
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