HCMS-2819 Datasheet, PDF (11/12 Pages) AVAGO TECHNOLOGIES LIMITED – High Performance CMOS 5x7 AlphaNumeric InGaN Blue Display

Appendix B. Electrical Considerations
Current Calculations
The peak and average display current requirements
have a significant impact on power supply selection.
The maximum peak current is calculated with Equation
3 below.
The average current required by the display can be calcu-
lated with Equation 4 below.
The power supply has to be able to supply I_PEAK transients
and supply I_LED (AVG) continuously. The range on V_LED
allows noise on this supply without significantly changing
the display brightness.
V_LOGIC and V_LED Considerations
The display uses two independent electrical systems. One
system is used to power the display’s logic and the other
to power the display’s LEDs. These two systems keep the
logic supply clean.
Separate electrical systems allow the voltage applied to
V_LED and V_LOGIC to be varied independently. Thus, V_LED can
vary from 0 to 5.5V without affecting either the Dot or the
Control Registers. V_LED can be varied between 4.0 to 5.5 V
without any noticeable variation in light output. However,
operating V_LED below 4.5 V may cause objectionable
mismatch between the pixels and is not recommended.
Dimming the display by pulse width modulating V_LED is
also not recommended.
V_LOGIC can vary from 3.0 to 5.5 V without affecting either
the displayed message or the display intensity. However,
operation below 4.5 V will change the timing and logic
levels and operation below 3 V may cause the Dot and
Control Registers to be altered
The logic ground is internally connected to the LED
ground by a substrate diode. This diode becomes forward
biased and conducts when the logic ground is 0.4 V
greater than the LED ground. The LED ground and the
logic ground should be connected to a common ground,
which can withstand the current introduced by the
switching LED drivers. When separate ground connections
are used, the LED ground can vary from -0.3 V to +0.3 V
with respect to the logic ground. Voltages below -0.3 V
can cause all the dots to be ON. Voltage above +0.3 V can
cause dimming and dot mismatch.
Using a decoupling capacitor between the power supply
and ground will help prevent any supply noise in the fre-
quency range greater than that of the functioning display
from interfering with the display’s internal circuitry. The
value of the capacitor depends on the series resistance
from the ground back to the power supply and the range
of frequencies that need to be suppressed. It is also advan-
tageous to use the largest ground plane possible.
Equation 1:
T _JMAX = T _A + P _D * Rθ_JA
Where:
T _JMAX = maximum IC junction temperature
T_A = ambient temperature surrounding the display
Rθ_JA = thermal resistance from the IC junction to ambient
P_D = power dissipated by the IC
Equation 2:
P_D = (N * I _PIXEL * Duty Factor * V _LED ) + I_LOGIC * V_LOGIC
Where:
P_D = total power dissipation
N = number of pixels on (maximum 4 char * 5 * 7 = 140)
I_PIXEL = peak pixel current.
Duty Factor = 1/8 * Osccyc/64
Osc cyc = number of ON oscillator cycles per row
I_LOGIC = IC logic current
V_LOGIC = logic supply voltage
Equation 3:
I _PEAK = M * 20 * I _PIXEL
Where:
I_PEAK = maximum instantaneous peak current for the display
M = number of ICs in the system
20 = maximum number of LEDs on per IC
I_PIXEL = peak current for one LED
Equation 4:
I_LED (AVG) = N * I _PIXEL* 1/8 * (oscillator cycles)/64
(see Variable Definitions above)
Electrostatic Discharge
The inputs to the ICs are protected against static discharge
and input current latchup. However, for best results, stan-
dard CMOS handling precautions should be used. Before
use, the HCMS-281x should be stored in antistatic tubes or
in conductive material. During assembly, a grounded con-
ductive work area should be used and assembly personnel
should wear conductive wrist straps. Lab coats made of
synthetic material should be avoided since they are prone
to static buildup. Input current latchup is caused when
the CMOS inputs are subjected to either a voltage below
ground (V_IN < ground) or to a voltage higher than V_LOGIC
(V_IN > V_LOGIC) and when a high current is forced into the
input. To prevent input current latchup and ESD damage,
unused inputs should be connected to either ground or
V_LOGIC. Voltages should not be applied to the inputs until
V_LOGIC has been applied to the display.
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