HCPL-0720-500E Datasheet, PDF (15/18 Pages) AVAGO TECHNOLOGIES LIMITED – 40 ns Propagation Delay, CMOS Optocoupler

Implementing DeviceNet and SDS with the HCPL‑772X/072X
With transmission rates up to 1 Mbit/s, both DeviceNet
and SDS are based upon the same broadcast-oriented,
communica­tions protocol — the Controller Area Network
(CAN). Three types of isolated nodes are recommended
for use on these networks: Isolated Node Powered by
the Network (Figure 18), Isolated Node with Transceiver
Powered by the Network (Figure 19), and Isolated Node
Providing Power to the Network (Figure 20).
Isolated Node Powered by the Network
This type of node is very flexible and as can be seen in
Figure 18, is regarded as “isolated” because not all of its
components have the same ground reference. Yet, all
compo­nents are still powered by the network. This node
contains two regulators: one is isolated and powers the
CAN controller, node-specific application and isolated
(node) side of the two optocoup­lers while the other is
non-isolated. The non-isolated regulator supplies the
transceiver and the non-isolated (network) half of the
two optocouplers.
NODE/APP SPECIFIC
µP/CAN
HCPL
772x/072x
HCPL
772x/072x
TRANSCEIVER
ISOLATED
SWITCHING
POWER
SUPPLY
REG.
GALVANIC
ISOLATION
BOUNDARY
DRAIN/SHIELD
SIGNAL
POWER
NETWORK
POWER
SUPPLY
Figure 18. Isolated node powered by the network.
V+ (SIGNAL)
V– (SIGNAL)
V+ (POWER)
V– (POWER)
Isolated Node with Transceiver Powered by the Network
Figure 19 shows a node powered by both the network
and another source. In this case, the transc­ eiver and iso-
lated (network) side of the two optocouplers are pow-
ered by the network. The rest of the node is powered by
the AC line which is very beneficial when an application
requires a significant amount of power. This method is
also desirable as it does not heavily load the network.
More importantly, the unique “dual-inverting” design of
the HCPL-772X/072X ensure the network will not “lock-
up” if either AC line power to the node is lost or the node
powered-off. Specifically, when input power (V_DD1) to the
HCPL-772X/072X located in the transmit path is eliminat-
ed, a RECESSIVE bus state is ensured as the HCPL‑772X/
072X output voltage (V_O) go HIGH.
*Bus V+ Sensing
It is suggested that the Bus V+ sense block shown in Fig-
ure 19 be implemented. A locally powered node with an
un-powered isolated Physical Layer will accumulate er-
rors and become bus-off if it attempts to transmit. The
Bus V+ sense signal would be used to change the BOI at-
tribute of the DeviceNet Object to the “auto-reset” (01)
value. Refer to Volume 1, Section 5.5.3. This would cause
the node to continually reset until bus power was detect-
ed. Once power was detected, the BOI attribute would
be returned to the “hold in bus-off” (00) value. The BOI
attribute should not be left in the “auto-reset” (01) value
since this defeats the jabber protection capability of the
CAN error confinement. Any inexpensive low frequency
optical isolator can be used to implement this feature.
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