HCTL-2001 Datasheet, PDF (1/12 Pages) AVAGO TECHNOLOGIES LIMITED – Quadrature Decoder/Counter Interface ICs

HCTL-2001
Quadrature Decoder/Counter Interface ICs
Data Sheet
Description
The HCTL-2001 is a CMOS ICs that performs the
quadrature decoder, counter, and bus interface
function. The HCTL-20XX family is designed to improve
system performance in digital closed loop motion
control systems and digital data input systems. It does
this by shifting time intensive quadrature decoder
functions to a cost effective hardware solution. The
HCTL-20XX consists of a quadrature decoder logic, a
binary up/down state counter, and an 8-bit bus
interface. The use of Schmitt-triggered CMOS inputs
and input noise filters allows reliable operation in noisy
environments. The HCTL-2001 contains 12-bit counter
and provides TLL/CMOS compatible tri-state output
buffers. Operation is specified for a temperature range
from –40 to +85°C at clock frequencies up to 14MHz.
The HCTL-2001 is compliant to RoHS directive and had
been declared as a lead free product.
Features
• Interfaces Encoder to Microprocessor
• 14 MHz Clock Operation
• High Noise Immunity:
Schmitt Trigger Inputs and Digital Noise Filter
• 12 -Bit Binary Up/Down Counter
• Latched Outputs
• 8-Bit Tristate Interface
• 8 or 12-Bit Operating Modes
• Substantially Reduced System Software
• 5V Operation (VDD – VSS)
• TTL/CMOS Compatible I/O
• Operating Temperature: -40°C to 85°C
• 16-Pin PDIP
Applications
• Interface Quadrature Incremental Encoders to
Microprocessors
• Interface Digital Potentiometers to Digital Data
Input Buses