ATA6616_12 Datasheet, PDF (99/308 Pages) ATMEL Corporation – 8K/16K Flash Microcontroller with LIN Transceiver, 5V Regulator and Watchdog

Atmel ATA6616/ATA6617
4.10.3.1
4.10.3.2
MCU Control Register – MCUCR
Bit
7
6
5
4
3
2
1
0
–
BODS BODSE
PUD
–
–
–
–
MCUCR
Read/Write
R
R/W
R/W
R/W
R
R
R
R
Initial Value
0
0
0
0
0
0
0
0
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0, 1). See “Con-
figuring the Pin” on page 91 for more details about this feature.
Port Control Register – PORTCR
Bit
7
-
Read/Write R/W
Initial Value
0
6
5
4
3
-
BBMB
BBMA
-
R/W
R/W
R/W
R/W
0
0
0
0
• Bits 5, 4 – BBMx: Break-Before-Make Mode Enable
2
1
0
-
PUDB PUDA PORTCR
R/W
R/W
R/W
0
0
0
When these bits are written to one, the port-wise Break-Before-Make mode is activated. The
intermediate tri-state cycle is then inserted when writing DDRxn to make an output. For further
information, see “Break-Before-Make Switching” on page 92.
• Bits 1, 0 – PUDx: Port-Wise Pull-up Disable
When these bits are written to one, the port-wise pull-ups in the defined I/O ports are disabled
even if the DDxn and PORTxn Registers are configured to enable the pull-ups
({DDxn, PORTxn} = 0, 1). The Port-Wise Pull-up Disable bits are ORed with the global Pull-up
Disable bit (PUD) from the MCUCR register. See “Configuring the Pin” on page 91 for more
details about this feature.
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