ATA6616_12 Datasheet, PDF (73/308 Pages) ATMEL Corporation – 8K/16K Flash Microcontroller with LIN Transceiver, 5V Regulator and Watchdog

Atmel ATA6616/ATA6617
4.7.1.3
Power-on Reset
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection
level is defined in Table 4-84 on page 270. The POR is activated whenever Vcc is below the
detection level. The POR circuit can be used to trigger the start-up Reset, as well as to detect
a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after Vcc rise. The RESET signal is activated again, without any
delay, when Vcc decreases below the detection level.
Figure 4-17. MCU Start-up, RESET Tied to Vcc
V_CCRR
V_CC
V_PORMAX
V_POT
V_PORMIN
TIME-OUT
t_TOUT
INTERNAL
RESET
Figure 4-18. MCU Start-up, RESET Extended Externally
V_CC
V_CCRR
V_POR
RESET
V_RST
4.7.1.4
TIME-OUT
INTERNAL
RESET
t_TOUT
External Reset
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see Table 4-83 on page 270) will generate a reset, even if the clock is
not running. Shorter pulses are not guaranteed to generate a reset. When the applied signal
reaches the Reset Threshold Voltage – V_RST – on its positive edge, the delay counter starts
the MCU after the Time-out period – t_TOUT – has expired. The External Reset can be disabled
by the RSTDISBL fuse, see Table 4-70 on page 251.
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