ATA6616_12 Datasheet, PDF (123/308 Pages) ATMEL Corporation – 8K/16K Flash Microcontroller with LIN Transceiver, 5V Regulator and Watchdog

Atmel ATA6616/ATA6617
a) Write any value to either of the registers OCR0A or TCCR0A.
b) Wait for the corresponding Update Busy Flag to be cleared.
c) Read TCNT0.
• During asynchronous operation, the synchronization of the interrupt flags for the
asynchronous timer takes 3 processor cycles plus one timer cycle. The timer is therefore
advanced by at least one before the processor can read the timer value causing the setting
of the interrupt flag. The Output Compare pin is changed on the timer clock and is not
synchronized to the processor clock.
4.11.10 Timer/Counter0 Prescaler
Figure 4-41. Prescaler for Timer/Counter0
XTAL2
XTAL1
Oscillator
clk_I/O
0
1
0
clk_TnS
1
Clear
10-BIT T/C PRESCALER
EXCLK
ASn
0
PSRn
CSn0
CSn1
CSn2
TIMER/COUNTERn CLOCK SOURCE
clk_Tn
The clock source for Timer/Counter0 is named clk_T0S. clk_T0S is by default connected to the
main system I/O clock clk_IO. By setting the AS0 bit in ASSR, Timer/Counter0 is asynchro-
nously clocked from the XTAL oscillator or XTAL1 pin. This enables use of Timer/Counter0 as
a Real Time Counter (RTC).
A crystal can then be connected between the XTAL1 and XTAL2 pins to serve as an indepen-
dent clock source for Timer/Counter0.
A external clock can also be used using XTAL1 as input. Setting AS0 and EXCLK enables this
configuration.
For Timer/Counter0, the possible prescaled selections are: clk_T0S/8, clk_T0S/32, clk_T0S/64,
clk_T0S/128, clk_T0S/256, and clk_T0S/1024. Additionally, clk_T0S as well as 0 (stop) may be
selected. Setting the PSR0 bit in GTCCR resets the prescaler. This allows the user to operate
with a predictable prescaler.
9132F–AUTO–02/12
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