U3600BM Datasheet, PDF (9/43 Pages) ATMEL Corporation – SINGLE CHIP CORDLESS TELEPHONE IC

4516C–CT0–08/02
U3600BM
R4: free (not used, for future extensions )
free
free
free
free
free
free
free
free
R5: Gain VCO2
free
free
KV23
KV22
KV21
M12
free
free
KV2[1:3]: Gain of VCO2
M12:
Double phase comparator frequency of PLL2
R6: Miscellaneus settings in synthesizer part
ETXO
M1CP
FRMT
IMIXI GMOD1 GMOD0 SU1
(TM)
ETXO: Enable HF-transmit output
M1CP: Changes 1 dB compression point and current consumption of Mixer1
(“0” –> high, “1” –> low)
FRMT: Output frequency range of MixerT
IMIXI:
Invert inputs of phase comparator in PLL2
GMOD[0:1]: Modulation gain of VCO1
SU1:
Speed-up phase comparator for PLL1
(TM):
Enable the internal test mode. It is mandatory that TM is kept to “0”!
(if not 0, the circuit will not work as expected or described here in this paper)
R7: PLL1 setting
DR1I1 DR1I0
RA11
RA10
DV1I3
DV1I2
DV1I1
DR1I[0:1]: Additional divider reference frequency PLL1
RA1[0:1]: Rough adjustment VCO1
DV1I[0:3]: Divider setting PLL1 integer part; “0” is LSB, “3” is MSB
DV1I0
R8: Divider PLL1 fractional part
DV1F7 DV1F6 DV1F5
DV1F4
DV1F3
DV1F2
DV1F1
DV1F[0:7]: Divider setting PLL1 fractional part; “0” is LSB, “7” is MSB
DV1F0
R9: Divider PLL3 LSBs
DV3I7
DV3I6
DV3I5
DV3I4
DV3I3
DV3I2
DV3I1
DV3I0
R10: Divider PLL3 MSBs and MSB of VCO3 fine adjustment
FA34
DV3I14 DV3I13 DV3I12 DV3I11 DV3I10
DV3I9
FA34:
Fine adjustment VCO3 (frequency reduction) MSB
DV1I[0:14]: Divider setting PLL3 integer part; “0” is LSB, “14” is MSB
DV3I8
9