AT91SAM9R64_1 Datasheet, PDF (891/903 Pages) ATMEL Corporation – AT91 ARM Thumb Microcontrollers

AT91SAM9R64/RL64 Preliminary
Doc. Rev.
6289B
Comments (Continued)
PMC:
Section 27.8.10 “PMC Clock Generator PLL Register”, inserted a 1 into bit field 29 and warning:
“Bit 29 must always be set to 1 when programming CKGR_PLLR register.
TSADCC:
Section 43.4.1 “Power Management”, updated.
UDPHS:
Figure 41-2 “Board Schematic”, updated.
Table 41-1, “UDPHS Endpoint Description”, High Bandwidth column updated.
“USB High Speed Device Port (UDPHS) User Interface”, internal test registers added.
Table 41-5, “Register Mapping”
Section 41.5.7 “UDPHS Test SOF Counter Register”
Section 41.5.8 “UDPHS Test A Counter Register”
Section 41.5.9 “UDPHS Test B Counter Register”
Section 41.5.10 “UDPHS Test Mode Register”
Electrical Characteristics:
Table 44-1, “Absolute Maximum Ratings”, updated industrial operating temperature.
Table 44-2, “DC Characteristics”, I_SCrows updated.
V_OL and V_OH rows updated with new conditions
Table 44-19, “Transfer Characteristics”, Gain Error row updated.
Section 44.6 “ADC”, section upgraded one level in chapter organization.
Figure 44-8 “SPI Slave Mode - NPCS Timings”, illustration replaced.
Section 44.8 “Timings”, except in formulas, negative values replaced by 0 in timing tables.
Table 44-22, “Processor Clock Waveform Parameters”, STH corner, MAX updated
Table 44-40, “MCI Timings High Speed”, added to datasheet.
Table 44-3, “Power Consumption for Different Modes”,Active mode updated.
Section 44.7 “Power Supply Characteristics”, section updated.
Mechanical Characteristics:
Table 45-1 and Table 45-5 Soldering Information is for Substrate Level.
ERRATA:
Section 47.2.11 “TSADCC”, added to errata.
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Doc. Rev.
6289A
Comments
First Issue
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6289C–ATARM–28-May-09
891