SAM4CM_14 Datasheet, PDF (879/1177 Pages) ATMEL Corporation – Atmel | SMART ARM-based Flash MCU

37.7.3 TC Channel Mode Register: Waveform Mode
Name:
TC_CMRx [x=0..2] (WAVE = 1)
Access: Read/Write
31
30
BSWTRG
29
28
BEEVT
27
26
BCPC
25
24
BCPB
23
22
ASWTRG
21
20
AEEVT
19
18
ACPC
17
16
ACPA
15
WAVE
14
13
WAVSEL
12
ENETRG
11
10
EEVT
9
8
EEVTEDG
7
CPCDIS
6
CPCSTOP
5
4
BURST
3
CLKI
2
1
0
TCCLKS
This register can only be written if the WPEN bit is cleared in the TC Write Protection Mode Register.
• TCCLKS: Clock Selection
Value
Name
0
TIMER_CLOCK1
1
TIMER_CLOCK2
2
TIMER_CLOCK3
3
TIMER_CLOCK4
4
TIMER_CLOCK5
5
XC0
6
XC1
7
XC2
Description
Clock selected: internal TIMER_CLOCK1 clock signal (from PMC)
Clock selected: internal TIMER_CLOCK2 clock signal (from PMC)
Clock selected: internal TIMER_CLOCK3 clock signal (from PMC)
Clock selected: internal TIMER_CLOCK4 clock signal (from PMC)
Clock selected: internal TIMER_CLOCK5 clock signal (from PMC)
Clock selected: XC0
Clock selected: XC1
Clock selected: XC2
• CLKI: Clock Invert
0: Counter is incremented on rising edge of the clock.
1: Counter is incremented on falling edge of the clock.
• BURST: Burst Signal Selection
Value
Name
0
NONE
1
XC0
2
XC1
3
XC2
Description
The clock is not gated by an external signal.
XC0 is ANDed with the selected clock.
XC1 is ANDed with the selected clock.
XC2 is ANDed with the selected clock.
• CPCSTOP: Counter Clock Stopped with RC Compare
0: Counter clock is not stopped when counter reaches RC.
1: Counter clock is stopped when counter reaches RC.
SAM4CM Series [DATASHEET]
Atmel-11203C-ATARM-SAM4CM32-SAM4CM16-SAM4CM8-Datasheet_06-Oct-14
879