SAM4CM_14 Datasheet, PDF (420/1177 Pages) ATMEL Corporation – Atmel | SMART ARM-based Flash MCU

22.4 Functional Description
22.4.1 Embedded Flash Organization
The embedded Flash interfaces directly with the 32-bit internal bus. The embedded Flash is composed of:
 Two memory planes organized in several pages of the same size for dual-plane devices
 Two 128-bit or 64-bit read buffers used for code read optimization
 One 128-bit or 64-bit read buffer used for data read optimization
 One write buffer that manages page programming. The write buffer size is equal to the page size. This buffer
is write-only and accessible all along the 1 Mbyte address space, so that each word can be written to its final
address.
 Several lock bits used to protect write/erase operation on several pages (lock region). A lock bit is
associated with a lock region composed of several pages in the memory plane.
 Several bits that may be set and cleared through the EEFC interface, called general-purpose non-volatile
memory bits (GPNVM bits)
The embedded Flash size, the page size, the organization of lock regions and the definition of GPNVM bits are
specific to the device. The EEFC returns a descriptor of the Flash controller after a Get Flash Descriptor command
has been issued by the application (see “Get Flash Descriptor Command” on page 426).
420
SAM4CM Series [DATASHEET]
Atmel-11203C-ATARM-SAM4CM32-SAM4CM16-SAM4CM8-Datasheet_06-Oct-14