SAM4CM_14 Datasheet, PDF (1001/1177 Pages) ATMEL Corporation – Atmel | SMART ARM-based Flash MCU

40.7.15 ADC Extended Mode Register
Name:
Address:
Access:
ADC_EMR
0x40038040
Read/Write
31
30
29
28
27
–
–
–
–
–
23
22
21
20
19
–
–
–
ASTE
–
15
14
13
12
11
–
–
CMPFILTER
–
7
6
5
4
3
CMPSEL
–
26
25
24
–
–
TAG
18
17
16
–
OSR
10
9
8
–
CMPALL
–
2
1
0
–
CMPMODE
This register can only be written if the WPEN bit is cleared in “ADC Write Protection Mode Register” .
• CMPMODE: Comparison Mode
Value
0
1
2
3
Name
LOW
HIGH
IN
OUT
Description
Generates an event when the converted data is lower than the low threshold of the window.
Generates an event when the converted data is higher than the high threshold of the window.
Generates an event when the converted data is in the comparison window.
Generates an event when the converted data is out of the comparison window.
• CMPSEL: Comparison Selected Channel
If CMPALL = 0: CMPSEL indicates which channel has to be compared.
If CMPALL = 1: No effect.
• CMPALL: Compare All Channels
0: Only the channel indicated in CMPSEL field is compared.
1: All channels are compared.
• CMPFILTER: Compare Event Filtering
Number of consecutive compare events necessary to raise the flag = CMPFILTER+1.
When programmed to 0, the flag rises as soon as an event occurs.
• OSR: Over Sampling Rate
Value
0
1
2
Name
NO_AVERAGE
OSR4
OSR16
Description
No averaging. ADC sample rate is maximum.
1-bit enhanced resolution by averaging. ADC sample rate divided by 4.
2-bit enhanced resolution by averaging. ADC sample rate divided by 16.
This field is active if LOWRES is cleared in ADC_MR.
Note: FREERUN (see ADC_MR) must be set to 0 when digital averaging is used.
SAM4CM Series [DATASHEET]
Atmel-11203C-ATARM-SAM4CM32-SAM4CM16-SAM4CM8-Datasheet_06-Oct-14
1001