AT572D940HF_14 Datasheet, PDF (670/745 Pages) ATMEL Corporation – High Performance MagicV VLIW DSP

33.6.4.2
Error Detection
There are five different error types that are not mutually exclusive. Each error concerns only spe-
cific fields of the CAN data frame (refer to the Bosch CAN specification for their
correspondence):
• CRC error (CERR bit in the CAN_SR register): With the CRC, the transmitter calculates a
checksum for the CRC bit sequence from the Start of Frame bit until the end of the Data
Field. This CRC sequence is transmitted in the CRC field of the Data or Remote Frame.
• Bit-stuffing error (SERR bit in the CAN_SR register): If a node detects a sixth consecutive
equal bit level during the bit-stuffing area of a frame, it generates an Error Frame starting with
the next bit-time.
• Bit error (BERR bit in CAN_SR register): A bit error occurs if a transmitter sends a dominant
bit but detects a recessive bit on the bus line, or if it sends a recessive bit but detects a
dominant bit on the bus line. An error frame is generated and starts with the next bit time.
• Form Error (FERR bit in the CAN_SR register): If a transmitter detects a dominant bit in one
of the fix-formatted segments CRC Delimiter, ACK Delimiter or End of Frame, a form error
has occurred and an error frame is generated.
• Acknowledgment error (AERR bit in the CAN_SR register): The transmitter checks the
Acknowledge Slot, which is transmitted by the transmitting node as a recessive bit, contains
a dominant bit. If this is the case, at least one other node has received the frame correctly. If
not, an Acknowledge Error has occurred and the transmitter will start in the next bit-time an
Error Frame transmission.
33.6.4.2.1
Fault Confinement
To distinguish between temporary and permanent failures, every CAN controller has two error
counters: REC (Receive Error Counter) and TEC (Transmit Error Counter). The counters are
incremented upon detected errors and respectively are decremented upon correct transmissions
or receptions. Depending on the counter values, the state of the node changes: the initial state
of the CAN controller is Error Active, meaning that the controller can send Error Active flags. The
controller changes to the Error Passive state if there is an accumulation of errors. If the CAN
controller fails or if there is an extreme accumulation of errors, there is a state transition to Bus
Off.
Figure 33-7. Line Error Mode
Init
TEC < 127
and
REC < 127
ERROR
PASSIVE
ERROR
ACTIVE
128 occurences of 11 consecutive recessive bits
or
CAN controller reset
TEC > 127
or
REC > 127
BUS OFF
TEC > 255
670 AT572D940HF Preliminary
7010A–DSP–07/08