AT572D940HF_14 Datasheet, PDF (424/745 Pages) ATMEL Corporation – High Performance MagicV VLIW DSP

Figure 26-14. Asynchronous Start Bit Detection
Sampling
Clock
(16 x)
Manchester
encoded
data ^Txd
Start
Detection
1234
The receiver is activated and starts Preamble and Frame Delimiter detection, sampling the data
at one quarter and then three quarters. If a valid preamble pattern or start frame delimiter is
detected, the receiver continues decoding with the same synchronization. If the stream does not
match a valid pattern or a valid start frame delimiter, the receiver re-synchronizes on the next
valid edge.The minimum time threshold to estimate the bit value is three quarters of a bit time.
If a valid preamble (if used) followed with a valid start frame delimiter is detected, the incoming
stream is decoded into NRZ data and passed to USART for processing. Figure 26-15 illustrates
Manchester pattern mismatch. When incoming data stream is passed to the USART, the
receiver is also able to detect Manchester code violation. A code violation is a lack of transition
in the middle of a bit cell. In this case, MANE flag in US_CSR register is raised. It is cleared by
writing the Control Register (US_CR) with the RSTSTA bit at 1. See Figure 26-16 for an exam-
ple of Manchester error detection during data phase.
Figure 26-15. Preamble Pattern Mismatch
Preamble Mismatch
Manchester coding error
Preamble Mismatch
invalid pattern
Manchester
encoded
data ^Txd
SFD DATA
Figure 26-16. Manchester Error Flag
Manchester
encoded
data ^Txd
sampling points
Preamble Length is set to 8
Preamble Length
is set to 4
SFD
Elementary character bit time
Entering USART character area
Preamble subpacket
and Start Frame Delimiter
were successfully
decoded
Manchester
Coding Error
detected
When the start frame delimiter is a sync pattern (ONEBIT field at 0), both command and data
delimiter are supported. If a valid sync is detected, the received character is written as RXCHR
424 AT572D940HF Preliminary
7010A–DSP–07/08