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AT572D940HF_14 Datasheet, PDF (135/745 Pages) ATMEL Corporation – High Performance MagicV VLIW DSP
AT572D940HF Preliminary
Table 15-4. EBI Pins and External Devices Connections (Continued)
Pins of the Interfaced Device
Pins
SDRAM
Compact
Flash
Compact
Flash
True IDE Mode
NAND Flash
Controller
A25
SDRAMC
SMC
–
CFRNW(1)
CFRNW(1)
–
NCS0
–
–
–
–
NCS1/SDCS
CS
–
–
–
NCS2
NCS3/NANDCS
NCS4/CFCS0
NCS5/CFCS1
–
–
–
–
–
–
–
CE(3)
–
CFCS0(1)
CFCS0(1)
–
–
CFCS1(1)
CFCS1(1)
–
NCS6/NANDOE
–
–
–
RE
NCS7/NANDWE
–
–
–
WE
NRD/CFOE
–
OE
–
–
NWR0/NWE/CFWE
–
WE
WE
–
NWR1/NBS1/CFIOR
DQM1
IOR
IOR
–
NWR3/NBS3/CFIOW
DQM3
IOW
IOW
–
CFCE1
–
CE1
CS0
–
CFCE2
–
CE2
CS1
–
SDCK
CLK
–
–
–
SDCKE
CKE
–
–
–
RAS
RAS
–
–
–
CAS
CAS
–
–
–
SDWE
WE
–
–
–
NWAIT
–
WAIT
WAIT
–
Pxx(2)
–
CD1 or CD2
CD1 or CD2
–
Pxx(2)
–
–
–
CE(3)
Pxx(2)
Notes:
–
–
–
RDY
1. Not directly connected to the CompactFlash slot. Permits the control of the bidirectional buffer between the EBI data bus
and the CompactFlash slot.
2. Any PIO line.
3. CE connection depends on the NAND Flash. For standard NAND Flash devices, it must be connected to any free PIO line.
For “CE don’t care” NAND Flash devices, it can be connected to either NCS3/NANDCS or to any free PIO line.
7010A–DSP–07/08
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