SAM4S_14 Datasheet, PDF (625/1231 Pages) ATMEL Corporation – ARM-based Flash MCU

Figure 32-8. Transmitter Block Diagram
SSC_TCMR.STTDLY
SSC_TFMR.FSDEN
SSC_RCMR.START SSC_TCMR.START ^{SSC_TFMR.DATNB}
SSC_TFMR.DATDEF
RXEN
TXEN
SSC_TFMR.MSBF
TX Start _{Start RX Start Start}
RF
RC0R
Selector _RF
Selector
TX Start
SSC_TFMR.FSDEN
SSC_TCMR.STTDLY != 0
Transmit Shift Register
0
1
SSC_CRTXEN
SSC_SRTXEN
SSC_CRTXDIS
TXEN
TX Controller
TD
Transmitter Clock
SSC_TFMR.DATLEN SSC_THR
SSC_TSHR
SSC_TFMR.FSLEN
TX Controller counter reached STTDLY
32.7.3 Receiver Operations
A received frame is triggered by a start event and can be followed by synchronization data before data
transmission.
The start event is configured setting the Receive Clock Mode Register (SSC_RCMR). See “Start” on page 626.
The frame synchronization is configured setting the Receive Frame Mode Register (SSC_RFMR). See “Frame
Sync” on page 628.
The receiver uses a shift register clocked by the receiver clock signal and the start mode selected in the
SSC_RCMR. The data is transferred from the shift register depending on the data format selected.
When the receiver shift register is full, the SSC transfers this data in the holding register, the status flag RXRDY is
set in SSC_SR and the data can be read in the receiver holding register. If another transfer occurs before read of
the RHR register, the status flag OVERUN is set in SSC_SR and the receiver shift register is transferred in the
RHR register.
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
625