SAM7S321_14 Datasheet, PDF (496/775 Pages) ATMEL Corporation – ARM-based Flash MCU

34.6.9 PWM Channel Mode Register
Register Name:
PWM_CMR[0..X-1]
Access Type:
Read/Write
31
30
29
28
27
26
25
–
–
–
–
–
–
–
23
22
21
20
19
18
17
–
–
–
–
–
–
–
15
14
13
12
11
10
9
–
–
–
–
–
CPD
CPOL
7
6
5
4
3
2
1
–
–
–
–
CPRE
• CPRE: Channel Pre-scaler
CPRE
0
0
0
0
MCK
0
0
0
1
MCK/2
0
0
1
0
MCK/4
0
0
1
1
MCK/8
0
1
0
0
MCK/16
0
1
0
1
MCK/32
0
1
1
0
MCK/64
0
1
1
1
MCK/128
1
0
0
0
MCK/256
1
0
0
1
MCK/512
1
0
1
0
MCK/1024
1
0
1
1
CLKA
1
1
0
0
CLKB
Other
Reserved
Channel Pre-scaler
• CALG: Channel Alignment
0 = The period is left aligned.
1 = The period is center aligned.
• CPOL: Channel Polarity
0 = The output waveform starts at a low level.
1 = The output waveform starts at a high level.
• CPD: Channel Update Period
0 = Writing to the PWM_CUPDx will modify the duty cycle at the next period start event.
1 = Writing to the PWM_CUPDx will modify the period at the next period start event.
24
–
16
–
8
CALG
0
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
496