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AT91SAM9261 Datasheet, PDF (480/688 Pages) ATMEL Corporation – ARM926EJ-S BASED MICROCONTROLLER | |||
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32.8.16 SSC Interrupt Mask Register
Name:
SSC_IMR
Access Type:
Read-only
31
30
29
28
27
â
â
â
â
â
23
22
21
20
19
â
â
â
â
â
15
14
13
12
11
â
â
â
â
RXSYN
7
RXBUF
6
ENDRX
5
OVRUN
4
RXRDY
3
TXBUFE
⢠TXRDY: Transmit Ready Interrupt Mask
0: The Transmit Ready Interrupt is disabled.
1: The Transmit Ready Interrupt is enabled.
⢠TXEMPTY: Transmit Empty Interrupt Mask
0: The Transmit Empty Interrupt is disabled.
1: The Transmit Empty Interrupt is enabled.
⢠ENDTX: End of Transmission Interrupt Mask
0: The End of Transmission Interrupt is disabled.
1: The End of Transmission Interrupt is enabled.
⢠TXBUFE: Transmit Buffer Empty Interrupt Mask
0: The Transmit Buffer Empty Interrupt is disabled.
1: The Transmit Buffer Empty Interrupt is enabled.
⢠RXRDY: Receive Ready Interrupt Mask
0: The Receive Ready Interrupt is disabled.
1: The Receive Ready Interrupt is enabled.
⢠OVRUN: Receive Overrun Interrupt Mask
0: The Receive Overrun Interrupt is disabled.
1: The Receive Overrun Interrupt is enabled.
⢠ENDRX: End of Reception Interrupt Mask
0: The End of Reception Interrupt is disabled.
1: The End of Reception Interrupt is enabled.
⢠RXBUFF: Receive Buffer Full Interrupt Mask
0: The Receive Buffer Full Interrupt is disabled.
1: The Receive Buffer Full Interrupt is enabled.
⢠CP0: Compare 0 Interrupt Mask
0: The Compare 0 Interrupt is disabled.
1: The Compare 0 Interrupt is enabled.
⢠CP1: Compare 1 Interrupt Mask
0: The Compare 1 Interrupt is disabled.
1: The Compare 1 Interrupt is enabled.
480 AT91SAM9261 Preliminary
26
â
18
â
10
TXSYN
2
ENDTX
25
â
17
â
9
CP1
1
TXEMPTY
24
â
16
â
8
CP0
0
TXRDY
6062FâATARMâ05-Dec-06
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