AT91SAM9261 Datasheet, PDF (11/688 Pages) ATMEL Corporation – ARM926EJ-S BASED MICROCONTROLLER

AT91SAM9261 Preliminary
5. Power Considerations
5.1 Power Supplies
The AT91SAM9261 has six types of power supply pins:
• VDDCORE pins: Power the core, including the processor, the memories and the
peripherals; voltage ranges from 1.08V and 1.32V, 1.2V nominal.
• VDDIOM pins: Power the External Bus Interface I/O lines; voltage ranges from 1.65V
to 1.95V and 3.0V to 3.6V, 1.8V and 3.3V nominal.
• VDDIOP pins: Power the Peripheral I/O lines and the USB transceivers; voltage
ranges from 2.7V to 3.6V, 3.3V nominal.
• VDDBU pin: Powers the Slow Clock oscillator and a part of the System Controller;
voltage ranges from 1.08V to 1.32V, 1.2V nominal.
• VDDPLL pin: Powers the PLL cells; voltage ranges from 3.0V to 3.6V, 3.3V nominal.
• VDDOSC pin: Powers the Main Oscillator cells; voltage ranges from 3.0V to 3.6V,
3.3V nominal.
The double power supplies VDDIOM and VDDIOP are identified in Table 4-1 on page
10. These supplies enable the user to power the device differently for interfacing with
memories and for interfacing with peripherals.
Ground pins GND are common to VDDCORE, VDDIOM and VDDIOP pins power sup-
plies. Separated ground pins are provided for VDDBU, VDDOSC and VDDPLL. The
ground pins are GNDBU, GNDOSC and GNDPLL, respectively.
5.2 Power Consumption
The AT91SAM9261 consumes about 550 µA of static current on VDDCORE at 25°C.
This static current rises at up to 5.5 mA if the temperature increases to 85°C.
On VDDBU, the current does not exceed 3 µA @25°C, but can rise at up to 20 µA
@85°C.
For dynamic power consumption, the AT91SAM9261 consumes a maximum of 50 mA
on VDDCORE at maximum speed in typical conditions (1.2V, 25°C), processor running
full-performance algorithm.
6. I/O Line Considerations
6.1 JTAG Port Pins
TMS, TDI and TCK are Schmitt trigger inputs and have no pull-up resistors.
TDO and RTCK are outputs, driven at up to VDDIOP, and have no pull-up resistor.
The JTAGSEL pin is used to select the JTAG boundary scan when asserted at a high
level (tied to VDDBU). It integrates a permanent pull-down resistor of about 15 kΩ to
GNDBU, so that it can be left unconnected for normal operations.
The NTRST pin is used to initialize the embedded ICE TAP Controller when asserted at
a low level. It integrates a permanent pull-up resistor of about 15 kΩ to VDDIOP, so that
it can be left unconnected for normal operations.
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6062F–ATARM–05-Dec-06