AT91SAM7A3_14 Datasheet, PDF (31/594 Pages) ATMEL Corporation – High-performance 32-bit RISC Architecture

AT91SAM7A3 Preliminary
– Remote Loopback, Local Loopback, Automatic Echo
11.4
Serial Synchronous Controller
• Provides serial synchronous communication links used in audio and telecom applications
• Contains an independent receiver and transmitter and a common clock divider
• Offers a configurable frame sync and data length
• Receiver and transmitter can be programmed to start automatically or on detection of
different event on the frame sync signal
• Receiver and transmitter include a data signal, a clock signal and a frame synchronization
signal
11.5 Timer Counter
• Three 16-bit Timer Counter Channels
• Wide range of functions including:
– Frequency Measurement
– Event Counting
– Interval Measurement
– Pulse Generation
– Delay Timing
– Pulse Width Modulation
– Up/down Capabilities
• Each channel is user-configurable and contains:
– Three external clock inputs
– Five internal clock inputs as defined in Table 11-2.
Table 11-2. Timer Counter Clock Assignment
TC Clock input
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
Clock
MCK/2
MCK/8
MCK/32
MCK/128
MCK/1024
– Two multi-purpose input/output signals
– Two global registers that act on all three TC Channels
11.6
PWM Controller
• Eight channels, one 20-bit counter per channel
• Common clock generator, providing thirteen different clocks
– A Modulo n counter providing eleven clocks
– Two independent linear dividers working on modulo n counter outputs
• Independent channel programming
31
6042E–ATARM–14-Dec-06