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AT91SAM7A3_14 Datasheet, PDF (1/594 Pages) ATMEL Corporation – High-performance 32-bit RISC Architecture | |||
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Features
⢠Incorporates the ARM7TDMI ® ARM® Thumb® Processor
â High-performance 32-bit RISC Architecture
â High-density 16-bit Instruction Set
â Leader in MIPS/Watt
⢠EmbeddedICE⢠In-circuit Emulation, Debug Communication Channel Support
⢠256 Kbytes of Internal High-speed Flash, Organized in 1024 Pages of 256 Bytes
â Single Cycle Access at Up to 30 MHz in Worst Case Conditions
â Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
â Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms
â 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities
⢠32K Bytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed
⢠Memory Controller (MC)
â Embedded Flash Controller, Abort Status and Misalignment Detection
â Memory Protection Unit
⢠Reset Controller (RSTC)
â Based on Three Power-on Reset Cells
â Provides External Reset Signal Shaping and Reset Sources Status
⢠Clock Generator (CKGR)
â Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL
⢠Power Management Controller (PMC)
â Power Optimization Capabilities, including Slow Clock Mode (Down to 500 Hz), Idle
Mode, Standby Mode and Backup Mode
â Four Programmable External Clock Signals
⢠Advanced Interrupt Controller (AIC)
â Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
â Four External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt
Protected
⢠Debug Unit (DBGU)
â 2-wire UART and Support for Debug Communication Channel interrupt
⢠Periodic Interval Timer (PIT)
â 20-bit Programmable Counter plus 12-bit Interval Counter
⢠Windowed Watchdog (WDT)
â 12-bit key-protected Programmable Counter
â Provides Reset or Interrupt Signal to the System
â Counter May Be Stopped While the Processor is in Debug Mode or in Idle State
⢠Real-time Timer (RTT)
â 32-bit Free-running Counter with Alarm
â Runs Off the Internal RC Oscillator
⢠Two Parallel Input/Output Controllers (PIO)
â Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
â Input Change Interrupt Capability on Each I/O Line
â Individually Programmable Open-drain, Pull-up resistor and Synchronous Output
⢠Shutdown Controller (SHDWC)
â Programmable Shutdown Pin and Wake-up Circuitry
⢠Two 32-bit Battery Backup Registers for a Total of 8 Bytes
⢠One 8-channel 20-bit PWM Controller (PWMC)
⢠One USB 2.0 Full Speed (12 Mbits per Second) Device Port
â On-chip Transceiver, 2376-byte Configurable Integrated FIFOs
AT91 ARM
Thumb-based
Microcontrollers
AT91SAM7A3
Preliminary
6042EâATARMâ14-Dec-06
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