AT91SAM7A3_14 Datasheet, PDF (111/594 Pages) ATMEL Corporation – High-performance 32-bit RISC Architecture

AT91SAM7A3 Preliminary
• FMCN: Flash Microsecond Cycle Number
Before writing Lock bits, this field must be set to the number of Master Clock cycles in one hundred nanoseconds.
When writing the rest of the Flash, this field defines the number of Master Clock cycles in 1.5 microseconds. This number
must be rounded up.
Warning: The value 0 is only allowed for a Master Clock period superior to 30 microseconds.
Warning: In order to guarantee valid operations on the Flash memory, the field Flash Microsecond Cycle Number (FMCN)
must be correctly programmed.
6042E–ATARM–14-Dec-06
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