AT24C16D_14 Datasheet, PDF (2/27 Pages) ATMEL Corporation – IC-Compatible (2-Wire) Serial EEPROM

1. Pin Descriptions and Pinouts
Table 1-1. Pin Descriptions
Pin
Pin
Number Symbol Pin Name and Functional Description
Asserted
State
Pin
Type
No Connect: The NC pins are not bonded to a die pad. These pins can
1, 2, 3
NC
—
—
be connected to GND or left floating.
Ground: The ground reference for the power supply. GND should be
4
GND
connected to the system ground.
—
Power
Serial Data: The SDA pin is an open-drain bidirectional input/output pin
used to serially transfer data to and from the device.
Input/
5
SDA _{The SDA pin must be pulled-high using an external pull-up resistor (not to}
—
Output
exceed 10K in value) and may be wire-ORed with any number of other
open-drain or open-collector pins from other devices on the same bus.
Serial Clock: The SCL pin is used to provide a clock to the device and to
control the flow of data to and from the device. Command and input data
present on the SDA pin is always latched in on the rising edge of SCL,
6
SCL ^{while output data on the SDA pin is clocked out on the falling edge of}
SCL.
—
Input
The SCL pin must either be forced high when the serial bus is idle or
pulled-high using an external pull-up resistor.
Write Protect: Connecting the WP pin to GND will ensure normal Write
operations. When the WP pin is connected to V_CC, all write operations to
7
WP _{the memory are inhibited.}
High
Input
Refer to Note 1 for the behavior of the pin when not connected.
Device Power Supply: The V_CC pin is used to supply the source voltage
8
V_CC to the device. Operations at invalid V_CC voltages may produce spurious
—
Power
results and should not be attempted.
Note:
1. If the WP pin is not driven, it is internally pulled down to GND. In order to operate in a wide variety of
application environments, the pull-down mechanism is intentionally designed to be somewhat strong. Once
these pins are biased above the CMOS input buffer’s trip point (~0.5 x V_CC), the pull-down mechanism
disengages. Atmel recommends connecting these pins to a known state whenever possible.
8-lead SOIC
8-lead TSSOP
8-pad UDFN
8-lead PDIP
NC
NC
NC
GND
1
8
2
7
3
6
4
5
Top View
V_CC
WP
SCL
SDA
NC
NC
NC
GND
1
8
2
7
3
6
4
5
Top View
V_CC
WP
SCL
SDA
NC 1
NC 2
NC 3
GND 4
8 V_CC
7 WP
6 SCL
5 SDA
Top View
NC 1
NC 2
NC 3
GND 4
8 V_CC
7 WP
6 SCL
5 SDA
Top View
(1)
5-lead SOT23
8-ball VFBGA
(1)
4-ball WLCSP
SCL 1 5 WP
GND 2
SDA
34
V_CC
Top View
NC 1
NC 2
NC 3
GND 4
8 V_CC
7 WP
6 SCL
5 SDA
Top View
VCC GND
SCL SDA
Top View
Note: Package drawings are not to scale.
2
AT24C16D [PRELIMINARY DATASHEET]
Atmel-8906A-SEEPROM-AT24C16D-Datasheet_042014