AT24C16D_14 Datasheet, PDF (15/27 Pages) ATMEL Corporation – IC-Compatible (2-Wire) Serial EEPROM

8.5 Power-Up Requirements and Reset Behavior
During a power-up sequence, the V_CC supplied to the AT24C16D should monotonically rise from GND to the
minimum V_CC level as specified in Section 8.2 with a slew rate no greater than 1V/μs.
8.5.1
Device Reset
To prevent Write operations or other spurious events from happening during a power-up sequence, the
AT24C16D includes a Power-On-Reset (POR) circuit. Upon power-up, the device will not respond to any
commands until the V_CC level crosses the internal voltage threshold (V_POR) that brings the device out of reset
and into standby mode.
The system designer must ensure the instructions are not sent to the device until the V_CC supply has reached a
stable value greater than or equal to the minimum V_CC level. Additionally, once the V_CC is greater than or equal
to the minimum V_CC level, the bus Master must wait at least t_PUP before sending the first command to the device.
See Table 8-1 for the values associated with these power-up parameters.
Table 8-1. Power-up Conditions
Symbol Parameter
Min
Max Units
t_PUP
Time required after V_CC is stable before the device can accept commands.
100
μs
V_POR
Power-On Reset Threshold Voltage.
1.5
V
t_POFF
Minimum time at V_CC = 0V between power cycles.
1
ms
If an event occurs in the system where the V_CC level supplied to the AT24C16D drops below the maximum V_POR
level specified, it is recommended that a full power cycle sequence be performed by first driving the V_CC pin to
GND, waiting at least the minimum t_POFF time, and then performing a new power-up sequence in compliance
with the requirements defined in this section.
8.6 Pin Capacitance⁽¹⁾
Symbol Test Condition
Max
C_I/O
Input/Output Capacitance (SDA)
8
C_IN
Input Capacitance (SCL)
6
Note: 1. This parameter is characterized but is not 100% tested in production.
Units
pF
pF
Conditions
V_I/O = 0V
V_IN = 0V
8.7 EEPROM Cell Performance Characteristics
Operation
Test Condition
Min
Max
Units
Write Endurance⁽¹⁾
Data Retention⁽²⁾
T_A = 25°C, V_CC(min)< V_CC < V_CC(max)
Byte or Page Write Mode
T_A = 55°C, V_CC(min)< V_CC < V_CC(max)
1,000,000
100
—
Write Cycles
—
Years
Notes: 1. Write endurance performance is determined through characterization and the qualification process.
2. The data retention capability is determined through qualification and is checked on each device in production.
AT24C16D [PRELIMINARY DATASHEET] 15
Atmel-8906A-SEEPROM-AT24C16D-Datasheet_042014