U3742BM Datasheet, PDF (19/32 Pages) ATMEL Corporation – UHF ASK/FSK RECEIVER

U3742BM
Figure 22. Timing Diagram of the OFF-command via Pin ENABLE
T_Doze
T_Sleep
t_off
ENABLE
DATA (U3742BM)
X
Serial bi-directional
data line
X
Receiving mode
Startup mode
Configuration of the
Receiver
The U3742BM receiver is configured via two 12-bit RAM registers called OPMODE and
LIMIT. The registers can be programmed by means of the bi-directional DATA port. If
the register contents have changed due to a voltage drop, this condition is indicated by a
certain output pattern called reset marker (RM). The receiver must be reprogrammed in
that case. After a power-on reset (POR), the registers are set to default mode. If the
receiver is operated in default mode, there is no need to program the registers.
Table 3 on page 20 shows the structure of the registers. According to Table 2, bit 1
defines if the receiver is set back to polling mode via the OFF command, (see section
“Receiving Mode” on page 16) or if it is programmed. Bit 2 represents the register
address. It selects the appropriate register to be programmed.
Table 2. Effect of Bit 1 and Bit 2 in Programming the Registers
Bit 1
1
0
0
Bit 2
x
1
0
Action
The receiver is set back to polling mode (OFF command)
The OPMODE register is programmed
The LIMIT register is programmed
Table 4 on page 20 and the following illustrate the effect of the individual configuration
words. The default configuration is highlighted for each word.
BR_Range sets the appropriate baud rate range. At the same time it defines XLim. XLim
is used to define the bit check limits T_{Lim_min} and T_{Lim_max} as shown in Table 4 on page
20.
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4735A–RKE–11/03