AT91SAM9261S_14 Datasheet, PDF (179/709 Pages) ATMEL Corporation – Incorporates the ARM926EJ-S ARM Thumb Processor

AT91SAM9261S
Figure 22-19. Early Read Wait State: NWE-controlled Write with No Hold Followed by a Read with one Set-up Cycle
MCK
A[25:2]
NBS0, NBS1,
NBS2, NBS3,
A0, A1
internal write controlling signal
external write controlling signal
(NWE)
NRD
D[31:0]
no hold
read setup = 1
write cycle
Early Read
read cycle
(WRITE_MODE = 1) wait state ^{(READ_MODE = 0 or READ_MODE = 1)}
22.9.3
Reload User Configuration Wait State
The user may change any of the configuration parameters by writing the SMC user interface.
When detecting that a new user configuration has been written in the user interface, the SMC
inserts a wait state before starting the next access. The so called “Reload User Configuration
Wait State” is used by the SMC to load the new set of parameters to apply to next accesses.
The Reload Configuration Wait State is not applied in addition to the Chip Select Wait State. If
accesses before and after re-programming the user interface are made to different devices
(Chip Selects), then one single Chip Select Wait State is applied.
On the other hand, if accesses before and after writing the user interface are made to the same
device, a Reload Configuration Wait State is inserted, even if the change does not concern the
current Chip Select.
22.9.3.1
User Procedure
To insert a Reload Configuration Wait State, the SMC detects a write access to any
SMC_MODE register of the user interface. If the user only modifies timing registers
(SMC_SETUP, SMC_PULSE, SMC_CYCLE registers) in the user interface, he must validate
the modification by writing the SMC_MODE, even if no change was made on the mode
parameters.
The user must not change the configuration parameters of an SMC Chip Select (Setup, Pulse,
Cycle, Mode) if accesses are performed on this CS during the modification. Any change of the
Chip Select parameters, while fetching the code from a memory connected on this CS, may lead
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